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| author | Raul E Rangel <rrangel@chromium.org> | 2022-03-24 16:51:21 -0600 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-03-28 15:43:53 +0000 |
| commit | cc1426b1cd8f82a3a8f027983a0ef66c6607610e (patch) | |
| tree | efcaa5c83af0cddb6af27a739609a42d53ae88f6 /src/soc/intel/elkhartlake/uart.c | |
| parent | f8daf86282c1be33643ace4e9f453e7548cab41c (diff) | |
mb/google/skyrim: Swap eSPI_CS_L and SOC_DISABLE_DISP_BL
The eSPI CS function only exists on AGPIO30.
We will need to rework all boards to make eSPI function.
I also fixed the comments on the other eSPI pins.
BUG=b:226635441
TEST=Build skyrim
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: Ib03c0a7dcad31d10dd4bad0d10a0184ab84aef9a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63093
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/soc/intel/elkhartlake/uart.c')
0 files changed, 0 insertions, 0 deletions