diff options
author | Tan, Lean Sheng <lean.sheng.tan@intel.com> | 2020-08-25 18:43:25 -0700 |
---|---|---|
committer | Subrata Banik <subrata.banik@intel.com> | 2020-08-31 12:37:11 +0000 |
commit | cecd7af95964f84e024013e27c9e8df465737ebc (patch) | |
tree | ca43903a13515e064255aaa34d509687c1ad8c6e /src/soc/intel/elkhartlake/romstage/fsp_params.c | |
parent | 4ce4afa9d99805dd296d991ffb85b3f68c347b02 (diff) |
soc/intel/elkhartlake/romstage: Do initial SoC commit till romstage
Clone entirely from Jasperlake
List of changes on top off initial jasperlake clone
1. Replace "Jasperlake" with "Elkhartlake"
2. Replace "jsl" with "ehl"
3. Rename structure based on Jasperlake with Elkhartlake
4. Clean up upd override in fsp_params.c, will be added later
5. Temporarily remove _weak attributes in fsp_param & romstage.c
6. Add required headers into include/soc/ from jasperlake directory
Signed-off-by: Tan, Lean Sheng <lean.sheng.tan@intel.com>
Change-Id: If2bbe0b8a12bb78b3650f9d0a60f002f7eacb513
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44801
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Diffstat (limited to 'src/soc/intel/elkhartlake/romstage/fsp_params.c')
-rw-r--r-- | src/soc/intel/elkhartlake/romstage/fsp_params.c | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/src/soc/intel/elkhartlake/romstage/fsp_params.c b/src/soc/intel/elkhartlake/romstage/fsp_params.c new file mode 100644 index 0000000000..3961dfc167 --- /dev/null +++ b/src/soc/intel/elkhartlake/romstage/fsp_params.c @@ -0,0 +1,31 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <assert.h> +#include <console/console.h> +#include <device/device.h> +#include <fsp/util.h> +#include <soc/pci_devs.h> +#include <soc/romstage.h> +#include <soc/soc_chip.h> +#include <string.h> + +static void soc_memory_init_params(FSP_M_CONFIG *m_cfg, + const struct soc_intel_elkhartlake_config *config) +{ + /* TODO: Update with UPD details as FSP matures */ +} + +void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) +{ + const struct soc_intel_elkhartlake_config *config = config_of_soc(); + FSP_M_CONFIG *m_cfg = &mupd->FspmConfig; + + soc_memory_init_params(m_cfg, config); + + mainboard_memory_init_params(mupd); +} + +void mainboard_memory_init_params(FSPM_UPD *mupd) +{ + /* TODO: Update later together with UPD updates */ +} |