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authorTan, Lean Sheng <lean.sheng.tan@intel.com>2021-05-24 23:15:43 -0700
committerPatrick Georgi <pgeorgi@google.com>2021-05-30 20:15:42 +0000
commit33f8fc698ca07a1fd38342e5d84f873896d6cc48 (patch)
tree652f2764a6b0bf8d2aec00648c79e06fa02c0003 /src/soc/intel/elkhartlake/chip.h
parentf303b4ffd92caf479153245a720c79eca5edb4ba (diff)
soc/intel/elkhartlake: Update FSP-M UPD related configs
Upload the FSP-M UPD configs. This CL also updated the chip.h and devicetree.cb with the relevant variables and configs. This CL also updated the GPIO related settings (PMC & SD card) in devicetree.cb. Signed-off-by: Lean Sheng Tan <lean.sheng.tan@intel.com> Change-Id: If6321064b37535b390cf3dd7c41a719c598a0cd7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/54892 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Diffstat (limited to 'src/soc/intel/elkhartlake/chip.h')
-rw-r--r--src/soc/intel/elkhartlake/chip.h28
1 files changed, 13 insertions, 15 deletions
diff --git a/src/soc/intel/elkhartlake/chip.h b/src/soc/intel/elkhartlake/chip.h
index 94174cf360..ce0984124d 100644
--- a/src/soc/intel/elkhartlake/chip.h
+++ b/src/soc/intel/elkhartlake/chip.h
@@ -19,9 +19,10 @@
#include <soc/usb.h>
#include <stdint.h>
-#define MAX_HD_AUDIO_DMIC_LINKS 2
-#define MAX_HD_AUDIO_SNDW_LINKS 4
-#define MAX_HD_AUDIO_SSP_LINKS 6
+#define MAX_HD_AUDIO_SDI_LINKS 2
+#define MAX_HD_AUDIO_DMIC_LINKS 2
+#define MAX_HD_AUDIO_SNDW_LINKS 4
+#define MAX_HD_AUDIO_SSP_LINKS 6
struct soc_intel_elkhartlake_config {
@@ -63,16 +64,15 @@ struct soc_intel_elkhartlake_config {
/* TCC activation offset */
uint32_t tcc_offset;
- /* System Agent dynamic frequency support. Only effects ULX/ULT CPUs.
- * When enabled memory will be training at two different frequencies.
- * 0:Disabled, 1:FixedPoint0, 2:FixedPoint1, 3:FixedPoint2,
- * 4:FixedPoint3, 5:Enabled */
+ /* System Agent dynamic frequency support.
+ * When enabled memory will be trained at different frequencies.
+ * 0:Disabled, 1:FixedPoint0(low), 2:FixedPoint1(mid), 3:FixedPoint2
+ * (high), 4:Enabled */
enum {
SaGv_Disabled,
SaGv_FixedPoint0,
SaGv_FixedPoint1,
SaGv_FixedPoint2,
- SaGv_FixedPoint3,
SaGv_Enabled,
} SaGv;
@@ -96,12 +96,10 @@ struct soc_intel_elkhartlake_config {
/* Audio related */
uint8_t PchHdaDspEnable;
uint8_t PchHdaAudioLinkHdaEnable;
+ uint8_t PchHdaSdiEnable[MAX_HD_AUDIO_SDI_LINKS];
uint8_t PchHdaAudioLinkDmicEnable[MAX_HD_AUDIO_DMIC_LINKS];
uint8_t PchHdaAudioLinkSspEnable[MAX_HD_AUDIO_SSP_LINKS];
uint8_t PchHdaAudioLinkSndwEnable[MAX_HD_AUDIO_SNDW_LINKS];
- uint8_t PchHdaIDispLinkTmode;
- uint8_t PchHdaIDispLinkFrequency;
- uint8_t PchHdaIDispCodecDisconnect;
/* PCIe Root Ports */
uint8_t PcieRpEnable[CONFIG_MAX_ROOT_PORTS];
@@ -129,6 +127,10 @@ struct soc_intel_elkhartlake_config {
uint8_t SdCardPowerEnableActiveHigh;
/* Gfx related */
+ uint8_t Heci2Enable;
+ uint8_t Heci3Enable;
+
+ /* Gfx related */
uint8_t SkipExtGfxScan;
uint8_t Device4Enable;
@@ -198,10 +200,6 @@ struct soc_intel_elkhartlake_config {
/* CNVi BT Audio Offload: Enable/Disable BT Audio Offload. */
bool CnviBtAudioOffload;
- /* Tcss */
- uint8_t TcssXhciEn;
- uint8_t TcssXdciEn;
-
/*
* Override GPIO PM configuration:
* 0: Use FSP default GPIO PM program,