diff options
| author | Tan, Lean Sheng <lean.sheng.tan@intel.com> | 2020-09-03 07:01:09 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-09-08 05:30:20 +0000 |
| commit | b369dde9b1cc9daffce83dc809101e0fd0a0e346 (patch) | |
| tree | 00dbd7450ef09e260e7facfbb2a8c9ee97a8c9f2 /src/soc/intel/elkhartlake/bootblock | |
| parent | 9440c5356762b94c019d2399d6cddbd61fba96c9 (diff) | |
soc/intel/elkhartlake: Update PMC related register definitions
Update ABase, PMC GPIO value sets and PMC register base address.
Signed-off-by: Tan, Lean Sheng <lean.sheng.tan@intel.com>
Change-Id: Iba43b791cab0665ddebfbed68b7e2d15406ad206
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45075
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'src/soc/intel/elkhartlake/bootblock')
| -rw-r--r-- | src/soc/intel/elkhartlake/bootblock/pch.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/elkhartlake/bootblock/pch.c b/src/soc/intel/elkhartlake/bootblock/pch.c index 3988cab3e0..9224c486ec 100644 --- a/src/soc/intel/elkhartlake/bootblock/pch.c +++ b/src/soc/intel/elkhartlake/bootblock/pch.c @@ -21,7 +21,7 @@ #include <soc/pcr_ids.h> #include <soc/pm.h> -#define PCR_PSF3_TO_SHDW_PMC_REG_BASE 0xA00 +#define PCR_PSF3_TO_SHDW_PMC_REG_BASE 0x0C00 #define PCR_PSFX_TO_SHDW_BAR0 0 #define PCR_PSFX_TO_SHDW_BAR1 0x4 |