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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2020-05-25 08:52:07 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2021-01-28 08:55:31 +0000 |
| commit | e76ce871c8f84aef38fbf9df9c8bee3c10c085d7 (patch) | |
| tree | 02359779387bb2b7b329150c9642280b5c0fb999 /src/soc/intel/denverton_ns | |
| parent | 49dbbe99c2e645f5d800fa9f88a97ff6d545efba (diff) | |
arch/x86: Remove most C_ENV_BOOTBLOCK_SIZE limits
With top-aligned bootblock this is no longer globally needed.
The default maximum is now a generous 256 KiB with couple
platforms having lower limits of 32 KiB and 64 KiB.
Change-Id: Ib1aee44908c0dcbc17978d3ee53bd05a6200410c
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47600
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/soc/intel/denverton_ns')
| -rw-r--r-- | src/soc/intel/denverton_ns/Kconfig | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig index 4fe491fce3..a7af6d587b 100644 --- a/src/soc/intel/denverton_ns/Kconfig +++ b/src/soc/intel/denverton_ns/Kconfig @@ -157,10 +157,6 @@ config CONSOLE_UART_BASE_ADDRESS hex "MMIO base address for UART" default 0xd4000000 -config C_ENV_BOOTBLOCK_SIZE - hex - default 0x8000 - choice prompt "Cache-as-ram implementation" default USE_DENVERTON_NS_CAR_NEM_ENHANCED |