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authorElyes HAOUAS <ehaouas@noos.fr>2020-05-27 16:21:55 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-06-06 09:43:11 +0000
commit379aab47f9bf4a804de168b61d3b2a1f6f789a91 (patch)
tree4b2435a2a04d78cdc40b641efc19431d966c53c0 /src/soc/intel/denverton_ns
parentcecc4a0d7a458b08808fbe818054408691896eea (diff)
src: Remove unused 'include <cpu/x86/mtrr.h>'
Change-Id: I3f08b9cc34582165785063580b3356135030f63e Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41782 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: David Guckian
Diffstat (limited to 'src/soc/intel/denverton_ns')
-rw-r--r--src/soc/intel/denverton_ns/bootblock/bootblock.c1
-rw-r--r--src/soc/intel/denverton_ns/romstage.c1
2 files changed, 0 insertions, 2 deletions
diff --git a/src/soc/intel/denverton_ns/bootblock/bootblock.c b/src/soc/intel/denverton_ns/bootblock/bootblock.c
index cabcdedc93..76db62e3fd 100644
--- a/src/soc/intel/denverton_ns/bootblock/bootblock.c
+++ b/src/soc/intel/denverton_ns/bootblock/bootblock.c
@@ -1,7 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <bootblock_common.h>
-#include <cpu/x86/mtrr.h>
#include <device/pci.h>
#include <FsptUpd.h>
#include <intelblocks/fast_spi.h>
diff --git a/src/soc/intel/denverton_ns/romstage.c b/src/soc/intel/denverton_ns/romstage.c
index abfd3dee10..713fb1e3ac 100644
--- a/src/soc/intel/denverton_ns/romstage.c
+++ b/src/soc/intel/denverton_ns/romstage.c
@@ -5,7 +5,6 @@
#include <cbmem.h>
#include <cf9_reset.h>
#include <console/console.h>
-#include <cpu/x86/mtrr.h>
#include <device/pci_ops.h>
#include <soc/fiamux.h>
#include <device/mmio.h>