diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-07-12 13:10:19 +0300 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2019-07-21 18:58:01 +0000 |
| commit | 71756c21afd14f4114c597487406eb53e23730b2 (patch) | |
| tree | 7ccb61cf5eb3a5b3fb3024327fce58d141c4e928 /src/soc/intel/denverton_ns | |
| parent | 6046eb405a4f1cbb4df1ed0d23276f333bc0998b (diff) | |
soc/intel: Expand SA_DEV_ROOT for ramstage
We do not want to disguise somewhat complex function
calls as simple macros.
Change-Id: I298f7f9a1c6a64cfba454e919eeaedc7bb2d4801
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34411
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/denverton_ns')
| -rw-r--r-- | src/soc/intel/denverton_ns/include/soc/pci_devs.h | 9 |
1 files changed, 3 insertions, 6 deletions
diff --git a/src/soc/intel/denverton_ns/include/soc/pci_devs.h b/src/soc/intel/denverton_ns/include/soc/pci_devs.h index 27f9e35326..2e510d9b46 100644 --- a/src/soc/intel/denverton_ns/include/soc/pci_devs.h +++ b/src/soc/intel/denverton_ns/include/soc/pci_devs.h @@ -21,16 +21,13 @@ /* All these devices live on bus 0 with the associated device and function */ -#define _SA_DEVFN(slot) PCI_DEVFN(SA_DEV_SLOT_##slot, 0) #define _PCH_DEVFN(slot, func) PCI_DEVFN(PCH_DEV_SLOT_##slot, func) -#if ENV_RAMSTAGE +#if !defined(__SIMPLE_DEVICE__) #include <device/device.h> #include <device/pci_def.h> -#define _SA_DEV(slot) pcidev_path_on_root_debug(_SA_DEVFN(slot), __func__) #define _PCH_DEV(slot, func) pcidev_path_on_root_debug(_PCH_DEVFN(slot, func), __func__) #else -#define _SA_DEV(slot) PCI_DEV(0, SA_DEV_SLOT_##slot, 0) #define _PCH_DEV(slot, func) PCI_DEV(0, PCH_DEV_SLOT_##slot, func) #endif @@ -191,8 +188,8 @@ /* TODO - New added */ #define SA_DEV_SLOT_ROOT 0x00 -#define SA_DEVFN_ROOT _SA_DEVFN(ROOT) -#define SA_DEV_ROOT _SA_DEV(ROOT) +#define SA_DEVFN_ROOT PCI_DEVFN(SA_DEV_SLOT_ROOT, 0) +#define SA_DEV_ROOT PCI_DEV(0, SA_DEV_SLOT_ROOT, 0) #define PCH_DEV_SLOT_LPC 0x1f #define PCH_DEVFN_LPC _PCH_DEVFN(LPC, 0) |