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| author | Michał Żygowski <michal.zygowski@3mdeb.com> | 2022-04-08 17:02:35 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-06-16 00:01:20 +0000 |
| commit | 9df95d99dc8c26b4f70e497a7cfc47782f273c61 (patch) | |
| tree | 00716cced58184ecf884aeb424aad157f04b7247 /src/soc/intel/denverton_ns | |
| parent | bda2a15113c1f76ac2d2cb1ebd79b0aea6f20204 (diff) | |
soc/intel/alderlake: Unselect USB4 and TCSS options for ADL-S
Alder Lake-S CPUs do not have TCSS and USB4 devices. Unselect them.
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: Ifc643d440107754dfe1a0844964f70de670cb1f1
Signed-off-by: Michał Kopeć <michal.kopec@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63500
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc/intel/denverton_ns')
0 files changed, 0 insertions, 0 deletions