diff options
| author | Sean Rhodes <sean@starlabs.systems> | 2022-07-18 11:31:00 +0100 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2022-10-22 17:11:25 +0000 |
| commit | 7bbc9a512aa1e19b8cb172fa3ad1cea5743bd3f3 (patch) | |
| tree | 86bededa1834752310365ad597d9c42727eea505 /src/soc/intel/denverton_ns | |
| parent | 27c8bf0cc936beb3d7b7012fa6d683ec74ed940f (diff) | |
payloads/edk2: Disable the CPU Timer Lib unless supported
For recent X86 CPUs, the 0x15 CPUID instruction will return Time Stamp
Counter Frequence. For CPUs that do not support this instruction, EDK2
must include a different library which is the reason why this must be
configured at build time.
If this is enabled, and the CPU doesn't support 0x15, it will fail to
boot. If is not enabled, and the CPU does support 0x15, it will still
boot but without support for the leaf. Consequently, disabled it by
default.
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I4f0f43ce50c4f6f7eb03063fff34d015468f6daa
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65950
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Diffstat (limited to 'src/soc/intel/denverton_ns')
| -rw-r--r-- | src/soc/intel/denverton_ns/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig index 8544ac5308..dcf9a5f0d4 100644 --- a/src/soc/intel/denverton_ns/Kconfig +++ b/src/soc/intel/denverton_ns/Kconfig @@ -20,6 +20,7 @@ config CPU_SPECIFIC_OPTIONS select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select CPU_SUPPORTS_PM_TIMER_EMULATION select DEBUG_GPIO + select EDK2_CPU_TIMER_LIB if PAYLOAD_EDK2 select FSP_M_XIP select FSP_T_XIP if FSP_CAR select HAVE_INTEL_FSP_REPO |