summaryrefslogtreecommitdiff
path: root/src/soc/intel/denverton_ns
diff options
context:
space:
mode:
authorAngel Pons <th3fanbus@gmail.com>2021-01-29 17:04:24 +0100
committerPatrick Georgi <pgeorgi@google.com>2021-02-27 09:40:17 +0000
commit0185d6d7604f0de5ea16c20860b25b8202a29d0a (patch)
tree987dac9b12a71e2abbc851e0bfa411e4acf35017 /src/soc/intel/denverton_ns
parentdd01e0131a8ba901bedec48844502fe85663390a (diff)
soc/intel/denverton_ns: Drop `pcidev_path_on_root_debug` usage
Currently, this function is only invoked for the SPI device through common SoC code. Since both Intel Harcuvar and Scaleway Tagada have enabled the SPI device in the devicetree, there's no need to use the debug version of `pcidev_path_on_root`. Change-Id: I4340d5860d23c2fa230105f7a7d345c367b2b2aa Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50128 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Suresh Bellampalli <suresh.bellampalli@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/denverton_ns')
-rw-r--r--src/soc/intel/denverton_ns/include/soc/pci_devs.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/denverton_ns/include/soc/pci_devs.h b/src/soc/intel/denverton_ns/include/soc/pci_devs.h
index 5eac5bddbe..0cb4c98ced 100644
--- a/src/soc/intel/denverton_ns/include/soc/pci_devs.h
+++ b/src/soc/intel/denverton_ns/include/soc/pci_devs.h
@@ -10,7 +10,7 @@
#if !defined(__SIMPLE_DEVICE__)
#include <device/device.h>
#include <device/pci_def.h>
-#define _PCH_DEV(slot, func) pcidev_path_on_root_debug(_PCH_DEVFN(slot, func), __func__)
+#define _PCH_DEV(slot, func) pcidev_path_on_root(_PCH_DEVFN(slot, func))
#else
#define _PCH_DEV(slot, func) PCI_DEV(0, PCH_DEV_SLOT_##slot, func)
#endif