diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2020-06-10 12:44:03 +0300 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-06-16 08:04:09 +0000 |
| commit | 0778c86b3b94490284d0fe686500d29ca791d39d (patch) | |
| tree | ff6a9cb768ff722966d1ecf732ec2e00d60c5a49 /src/soc/intel/denverton_ns | |
| parent | 040c531158861284b7d21f1e8a26b1f6d4ccad58 (diff) | |
sb,soc/intel: Replace smm_southbridge_enable_smi()
Change-Id: I8a2e8b0c104d9e08f07aeb6a2c32106480ace3e5
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41961
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel/denverton_ns')
| -rw-r--r-- | src/soc/intel/denverton_ns/cpu.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/denverton_ns/smm.c | 9 |
2 files changed, 8 insertions, 3 deletions
diff --git a/src/soc/intel/denverton_ns/cpu.c b/src/soc/intel/denverton_ns/cpu.c index 325a4a75e6..9764a3edbb 100644 --- a/src/soc/intel/denverton_ns/cpu.c +++ b/src/soc/intel/denverton_ns/cpu.c @@ -246,7 +246,7 @@ static void post_mp_init(void) * Now that all APs have been relocated as well as the BSP let SMIs * start flowing. */ - smm_southbridge_enable_smi(); + global_smi_enable(); } /* diff --git a/src/soc/intel/denverton_ns/smm.c b/src/soc/intel/denverton_ns/smm.c index 6ef06d483a..b4970adf9d 100644 --- a/src/soc/intel/denverton_ns/smm.c +++ b/src/soc/intel/denverton_ns/smm.c @@ -33,12 +33,12 @@ void smm_southbridge_clear_state(void) clear_pmc_status(); } -void smm_southbridge_enable_smi(void) +static void smm_southbridge_enable(uint16_t pm1_events) { printk(BIOS_DEBUG, "Enabling SMIs.\n"); /* Configure events Disable PCIe wake. */ - enable_pm1(PWRBTN_EN | GBL_EN | PCIEXPWAK_DIS); + enable_pm1(pm1_events | PCIEXPWAK_DIS); disable_gpe(PME_B0_EN); /* Enable SMI generation: @@ -52,6 +52,11 @@ void smm_southbridge_enable_smi(void) enable_smi(APMC_EN | SLP_SMI_EN | GBL_SMI_EN | EOS); } +void global_smi_enable(void) +{ + smm_southbridge_enable(PWRBTN_EN | GBL_EN); +} + void smm_setup_structures(void *gnvs, void *tcg, void *smi1) { /* |