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| author | Stephen Douthit <stephend@silicom-usa.com> | 2019-08-05 10:46:02 -0400 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-03-10 20:45:34 +0000 |
| commit | a51f4908704bee5e83f911eaf2fc241795b060ac (patch) | |
| tree | 261b7afa9bb391274301c036670623d10219ad11 /src/soc/intel/denverton_ns/xhci.c | |
| parent | aa6a8fb9198acfe22fec944bc9484a800d689ff4 (diff) | |
soc/intel/dnv: Fix ACPI reporting of root port interrupt routing
pcie_port.asl defines an IRQM method that looks up legacy interrupt
swizzling based on incoming interrupt "pin" A-D and root port number.
Unfortunately the 8-bit root port number stored at offset 0x4F in the
config space matches the device number, not the 1-8 scheme used in
the LUT reported to the OS.
Fix the case values to match the hardware.
Change-Id: I103d632a4bc99461f02e05aa0f9a9eb7376770d9
Signed-off-by: Stephen Douthit <stephend@silicom-usa.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34712
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/intel/denverton_ns/xhci.c')
0 files changed, 0 insertions, 0 deletions