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authorMariusz Szafranski <mariuszx.szafranski@intel.com>2017-08-02 17:28:17 +0200
committerPatrick Georgi <pgeorgi@google.com>2017-09-05 13:39:54 +0000
commita404133547c98094a326f60b83e1576ba94b8c06 (patch)
tree59847d084c0462833878627491cfbf3e67fca4af /src/soc/intel/denverton_ns/tsc_freq.c
parent84c4987eae9f8686e6d92e38ee18744d69576f2d (diff)
soc/intel/denverton_ns: Add support for Intel Atom C3000 SoC
This change adds support for Intel Atom C3000 SoC ("Denverton" and "Denverton-NS"). Code is partially based on Apollo Lake/Skylake code. Change-Id: I53d69aede3b92f1fe06b74a96cc40187fb9825f1 Signed-off-by: Mariusz Szafranski <mariuszx.szafranski@intel.com> Reviewed-on: https://review.coreboot.org/20861 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: FEI WANG <wangfei.jimei@gmail.com>
Diffstat (limited to 'src/soc/intel/denverton_ns/tsc_freq.c')
-rw-r--r--src/soc/intel/denverton_ns/tsc_freq.c31
1 files changed, 31 insertions, 0 deletions
diff --git a/src/soc/intel/denverton_ns/tsc_freq.c b/src/soc/intel/denverton_ns/tsc_freq.c
new file mode 100644
index 0000000000..6bf2a48d13
--- /dev/null
+++ b/src/soc/intel/denverton_ns/tsc_freq.c
@@ -0,0 +1,31 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2013 Google Inc.
+ * Copyright (C) 2014 - 2017 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <cpu/x86/msr.h>
+#include <cpu/x86/tsc.h>
+#include <arch/cpu.h>
+
+#include <soc/cpu.h>
+#include <soc/msr.h>
+
+unsigned long tsc_freq_mhz(void)
+{
+ msr_t platform_info;
+
+ platform_info = rdmsr(MSR_PLATFORM_INFO);
+ return CPU_BCLK * ((platform_info.lo >> 8) & 0xff);
+}