diff options
author | Patrick Rudolph <siro@das-labor.org> | 2018-10-01 19:17:11 +0200 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2018-10-22 08:35:32 +0000 |
commit | f677d17ab3cfd1471c0f238a0d32b0d56dd8d37f (patch) | |
tree | 9b0c01512de536210262110ac4e7dfb78d6849c1 /src/soc/intel/denverton_ns/reset.c | |
parent | 45022ae056cdbf58429b77daf2da176306312801 (diff) |
intel: Use CF9 reset (part 2)
Make use of the common CF9 reset in SOC_INTEL_COMMON_RESET. Also
implement board_reset() as a "full reset" (aka. cold reset) as that
is what was used here for hard_reset().
Drop soc_reset_prepare() thereby, as it was only used for APL. Also,
move the global-reset logic.
We leave some comments to remind us that a system_reset() should
be enough, where a full_reset() is called now (to retain current
behaviour) and looks suspicious.
Note, as no global_reset() is implemented for Denverton-NS, we halt
there now instead of issuing a non-global reset. This seems safer;
a non-global reset might result in a reset loop.
Change-Id: I5e7025c3c9ea6ded18e72037412b60a1df31bd53
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/29169
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/denverton_ns/reset.c')
-rw-r--r-- | src/soc/intel/denverton_ns/reset.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/soc/intel/denverton_ns/reset.c b/src/soc/intel/denverton_ns/reset.c index 97955a574a..577f1c4914 100644 --- a/src/soc/intel/denverton_ns/reset.c +++ b/src/soc/intel/denverton_ns/reset.c @@ -15,13 +15,12 @@ #include <console/console.h> #include <fsp/util.h> -#include <reset.h> void chipset_handle_reset(uint32_t status) { switch (status) { case FSP_STATUS_RESET_REQUIRED_5: /* Global Reset */ - global_reset(); + die("Global Reset not implemented!\n"); break; default: printk(BIOS_ERR, "unhandled reset type %x\n", status); |