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authorMariusz Szafranski <mariuszx.szafranski@intel.com>2017-08-02 17:28:17 +0200
committerPatrick Georgi <pgeorgi@google.com>2017-09-05 13:39:54 +0000
commita404133547c98094a326f60b83e1576ba94b8c06 (patch)
tree59847d084c0462833878627491cfbf3e67fca4af /src/soc/intel/denverton_ns/npk.c
parent84c4987eae9f8686e6d92e38ee18744d69576f2d (diff)
soc/intel/denverton_ns: Add support for Intel Atom C3000 SoC
This change adds support for Intel Atom C3000 SoC ("Denverton" and "Denverton-NS"). Code is partially based on Apollo Lake/Skylake code. Change-Id: I53d69aede3b92f1fe06b74a96cc40187fb9825f1 Signed-off-by: Mariusz Szafranski <mariuszx.szafranski@intel.com> Reviewed-on: https://review.coreboot.org/20861 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: FEI WANG <wangfei.jimei@gmail.com>
Diffstat (limited to 'src/soc/intel/denverton_ns/npk.c')
-rw-r--r--src/soc/intel/denverton_ns/npk.c51
1 files changed, 51 insertions, 0 deletions
diff --git a/src/soc/intel/denverton_ns/npk.c b/src/soc/intel/denverton_ns/npk.c
new file mode 100644
index 0000000000..46e5c7ef74
--- /dev/null
+++ b/src/soc/intel/denverton_ns/npk.c
@@ -0,0 +1,51 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 - 2017 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <arch/io.h>
+#include <console/console.h>
+#include <device/device.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+
+#include <soc/pci_devs.h>
+#include <soc/ramstage.h>
+
+static void npk_init(device_t dev)
+{
+ printk(BIOS_DEBUG, "pch: npk_init\n");
+
+ /* TODO */
+}
+
+static void pci_npk_read_resources(device_t dev)
+{
+ /* Skip NorthPeak enumeration. */
+}
+
+static struct device_operations pmc_ops = {
+ .read_resources = pci_npk_read_resources,
+ .set_resources = pci_dev_set_resources,
+ .enable_resources = pci_dev_enable_resources,
+ .scan_bus = 0,
+ .init = npk_init,
+ .ops_pci = &soc_pci_ops,
+};
+
+static const struct pci_driver pch_pmc __pci_driver = {
+ .ops = &pmc_ops,
+ .vendor = PCI_VENDOR_ID_INTEL,
+ .device = NPK_DEVID,
+};