soc/intel/denverton_ns: Fill dimm info for SMBIOS table 17

Rework display_fsp_smbios_memory_info_hob (shared code).

Import code to convert memory HOB to dimm info for SMBIOS table 17
mostly copied from fsp1_1 mainboard_save_dimm_info.

Change-Id: Id5c4ceaf4e65359f72ec764f0914b5daa82f257e
Signed-off-by: Julien Viard de Galbert <jviarddegalbert@online.net>
Reviewed-on: https://review.coreboot.org/23851
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

2 files changed, 58 insertions, 0 deletions

diff --git a/src/soc/intel/denverton_ns/include/soc/hob_mem.h b/src/soc/intel/denverton_ns/include/soc/hob_mem.h
new file mode 100644
index 0000000000..d98295b6f2
--- /dev/null
+++ b/src/soc/intel/denverton_ns/include/soc/hob_mem.h
@@ -0,0 +1,55 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Google Inc.
+ * Copyright (C) 2015-2016 Intel Corporation.
+ * Copyright (C) 2017-2018 Online SAS.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+
+#ifndef _DENVERTON_NS_HOB_MEM_H
+#define _DENVERTON_NS_HOB_MEM_H
+
+#include <fsp/util.h>
+
+void soc_display_fsp_smbios_memory_info_hob(
+		const FSP_SMBIOS_MEMORY_INFO *memory_info_hob);
+
+void soc_save_dimm_info(void);
+
+#define FSP_SMBIOS_MEMORY_INFO_GUID	\
+{	\
+	0x8c, 0x10, 0xa1, 0x01, 0xee, 0x9d, 0x84, 0x49,	\
+	0x88, 0xc3, 0xee, 0xe8, 0xc4, 0x9e, 0xfb, 0x89	\
+}
+
+static inline const FSP_SMBIOS_MEMORY_INFO *
+soc_get_fsp_smbios_memory_info_hob(void)
+{
+	size_t hob_size;
+	const FSP_SMBIOS_MEMORY_INFO *memory_info_hob;
+	const uint8_t smbios_memory_info_guid[16] =
+			FSP_SMBIOS_MEMORY_INFO_GUID;
+
+	/* Locate the memory info HOB */
+	memory_info_hob = fsp_find_extension_hob_by_guid(
+				smbios_memory_info_guid,
+				&hob_size);
+	if (memory_info_hob == NULL || hob_size == 0) {
+		printk(BIOS_ERR, "SMBIOS MEMORY_INFO_DATA_HOB not found\n");
+		return NULL;
+	}
+
+	return memory_info_hob;
+}
+
+#endif // _DENVERTON_NS_HOB_MEM_H
diff --git a/src/soc/intel/denverton_ns/include/soc/ramstage.h b/src/soc/intel/denverton_ns/include/soc/ramstage.h
index c53d811462..fa8beb165c 100644
--- a/src/soc/intel/denverton_ns/include/soc/ramstage.h
+++ b/src/soc/intel/denverton_ns/include/soc/ramstage.h
@@ -19,10 +19,13 @@
 #include <device/device.h>
 #include <fsp/api.h>
 #include <fsp/util.h>
+#include <memory_info.h>
 
 void denverton_init_cpus(device_t dev);
 void mainboard_silicon_init_params(FSPS_UPD *params);
 void southcluster_enable_dev(device_t dev);
+void mainboard_add_dimm_info(struct memory_info *mem_info, int channel,
+			     int dimm, int index);
 
 extern struct pci_operations soc_pci_ops;