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authorSridhar Siricilla <sridhar.siricilla@intel.com>2023-01-10 15:05:07 +0530
committerMartin L Roth <gaumless@gmail.com>2023-01-15 01:57:18 +0000
commitdd7d51d12f4cc305ba3d211468f23563acd1f6f1 (patch)
tree61e821c20b2701c22d4adf4c25a0f7bc6c7109bd /src/soc/intel/common
parentad6d3128f87c47369f015122ae3e9905de7a0df9 (diff)
soc/intel/common: Use 'enum cb_err' values
The patch uses cb_err enum values as return values for function cse_get_boot_performance_data() instead of true/false. TEST=Build code for Gimble Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com> Change-Id: I0153d5496c96fb0c2a576eef1fe2fa7fa0db8415 Reviewed-on: https://review.coreboot.org/c/coreboot/+/71824 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'src/soc/intel/common')
-rw-r--r--src/soc/intel/common/block/cse/cse_lite.c8
-rw-r--r--src/soc/intel/common/block/cse/telemetry.c2
-rw-r--r--src/soc/intel/common/block/include/intelblocks/cse.h2
3 files changed, 6 insertions, 6 deletions
diff --git a/src/soc/intel/common/block/cse/cse_lite.c b/src/soc/intel/common/block/cse/cse_lite.c
index 08a3d1fef5..c4ca41b9fe 100644
--- a/src/soc/intel/common/block/cse/cse_lite.c
+++ b/src/soc/intel/common/block/cse/cse_lite.c
@@ -156,7 +156,7 @@ void cse_log_ro_write_protection_info(bool mfg_mode)
printk(BIOS_ERR, "ME: Write protection for CSE RO is not enabled\n");
}
-bool cse_get_boot_performance_data(struct cse_boot_perf_rsp *boot_perf_rsp)
+enum cb_err cse_get_boot_performance_data(struct cse_boot_perf_rsp *boot_perf_rsp)
{
struct cse_boot_perf_req {
struct mkhi_hdr hdr;
@@ -174,16 +174,16 @@ bool cse_get_boot_performance_data(struct cse_boot_perf_rsp *boot_perf_rsp)
if (heci_send_receive(&req, sizeof(req), boot_perf_rsp, &resp_size,
HECI_MKHI_ADDR)) {
printk(BIOS_ERR, "cse_lite: Could not get boot performance data\n");
- return false;
+ return CB_ERR;
}
if (boot_perf_rsp->hdr.result) {
printk(BIOS_ERR, "cse_lite: Get boot performance data resp failed: %d\n",
boot_perf_rsp->hdr.result);
- return false;
+ return CB_ERR;
}
- return true;
+ return CB_SUCCESS;
}
diff --git a/src/soc/intel/common/block/cse/telemetry.c b/src/soc/intel/common/block/cse/telemetry.c
index f3dd7ee819..5f36360574 100644
--- a/src/soc/intel/common/block/cse/telemetry.c
+++ b/src/soc/intel/common/block/cse/telemetry.c
@@ -22,7 +22,7 @@ static void cbmem_inject_telemetry_data(void)
* 4. All other TS values will be relative to the zero point. The API caller should
* normalize the TS values to the zero-point value.
*/
- if (!cse_get_boot_performance_data(&cse_perf_data))
+ if (cse_get_boot_performance_data(&cse_perf_data) != CB_SUCCESS)
return;
current_time = timestamp_get();
diff --git a/src/soc/intel/common/block/include/intelblocks/cse.h b/src/soc/intel/common/block/include/intelblocks/cse.h
index 356df0560d..422f69c1c6 100644
--- a/src/soc/intel/common/block/include/intelblocks/cse.h
+++ b/src/soc/intel/common/block/include/intelblocks/cse.h
@@ -524,7 +524,7 @@ bool skip_cse_sub_part_update(void);
* This command retrieves a set of boot performance timestamps CSME collected during
* the last platform boot flow.
*/
-bool cse_get_boot_performance_data(struct cse_boot_perf_rsp *boot_perf);
+enum cb_err cse_get_boot_performance_data(struct cse_boot_perf_rsp *boot_perf);
/* Function to make cse disable using PMC IPC */
bool cse_disable_mei_devices(void);