diff options
author | Subrata Banik <subratabanik@google.com> | 2023-04-19 20:48:01 +0530 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2023-04-21 15:22:51 +0000 |
commit | db7b35a9c97c07a6097779459a7816c38242f569 (patch) | |
tree | 878d3178cb2ef9a5fd62b3171770ad99fb69f3e6 /src/soc/intel/common | |
parent | b2f5a22c4a3f4c715f51bd6894b1e3e86d6d1715 (diff) |
soc/intel/cmn/cse: Refactor ramstage_cse_fw_sync() function
This patch refactors sleep type check inside ramstage_cse_fw_sync()
to avoid additional logic while performing cse_fw_sync() operation.
TEST=Able to build and boot google/marasov.
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I7c7a91c81d51dbf6742e12c58a24b9f52fff5630
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74581
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Diffstat (limited to 'src/soc/intel/common')
-rw-r--r-- | src/soc/intel/common/block/cse/cse_lite.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/intel/common/block/cse/cse_lite.c b/src/soc/intel/common/block/cse/cse_lite.c index 4cc9e19d7c..1e2a052378 100644 --- a/src/soc/intel/common/block/cse/cse_lite.c +++ b/src/soc/intel/common/block/cse/cse_lite.c @@ -1211,10 +1211,10 @@ enum cb_err cse_get_fpt_partition_info(enum fpt_partition_id id, struct fw_versi static void ramstage_cse_fw_sync(void *unused) { - bool s3wake; - s3wake = acpi_get_sleep_type() == ACPI_S3; + if (acpi_get_sleep_type() == ACPI_S3) + return; - if (CONFIG(SOC_INTEL_CSE_LITE_SYNC_IN_RAMSTAGE) && !s3wake) { + if (CONFIG(SOC_INTEL_CSE_LITE_SYNC_IN_RAMSTAGE)) { timestamp_add_now(TS_CSE_FW_SYNC_START); cse_fw_sync(); timestamp_add_now(TS_CSE_FW_SYNC_END); |