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| author | Jeremy Soller <jeremy@system76.com> | 2023-05-16 15:04:08 -0600 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2023-08-09 14:57:55 +0000 |
| commit | d59c79987df0498de7ee847f41782457a5320141 (patch) | |
| tree | e79ad91a06d476041aeb50c0b13233c0335e0683 /src/soc/intel/common | |
| parent | 646f7b8443b2228f563e0c8bd78257c85db59b4f (diff) | |
Revert "soc/intel/{adl, cmn/pcie}: Fix ASPM configuration enum definitions"
This reverts commit 5dfec718290609dc0fd0331070ad703107e0b7e7.
Reason for revert: This change made it impossible to disable ASPM by
FSP parameter. ASPM_DISABLE would result in the FSP parameter not
being programmed, causing it to be the FSP default value instead.
This additionally fixes MTL to match ADL.
Change-Id: I60c0ea08513fcb0035449ea3fef1681de528c545
Signed-off-by: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75280
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common')
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/pcie_rp.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/pcie_rp.h b/src/soc/intel/common/block/include/intelblocks/pcie_rp.h index be7c5f93f8..dff4d97382 100644 --- a/src/soc/intel/common/block/include/intelblocks/pcie_rp.h +++ b/src/soc/intel/common/block/include/intelblocks/pcie_rp.h @@ -47,6 +47,7 @@ enum L1_substates_control { /* This enum is for passing into an FSP UPD, typically ASPM */ enum ASPM_control { + ASPM_DEFAULT, ASPM_DISABLE, ASPM_L0S, ASPM_L1, |