summaryrefslogtreecommitdiff
path: root/src/soc/intel/common
diff options
context:
space:
mode:
authorRocky Phagura <rphagura@fb.com>2021-04-03 08:49:32 -0700
committerPatrick Georgi <pgeorgi@google.com>2021-06-04 12:38:32 +0000
commitd4db36e672644ac7f528d12c5ce3539725456085 (patch)
tree54887ccb33b3d62df2a684613006da4275c46d16 /src/soc/intel/common
parent3bfa1bde60dc3197c27f60ed7b25f9cbdbd3c4bb (diff)
src/intel/xeon_sp: add hardware error support (HEST)
This patch adds the ACPI hardware error source table (HEST) support. This involves a few different parts: (1) The ACPI HEST table which is filled with the appropriate fields (2) Reserved memory which is used by runtime SW to provide error information. OS will not accept a HEST table with this memory set to 0. The ASL code to enable APEI bit will be submitted in a separate patch. Tested on DeltaLake mainboard with following options enabled SOC_INTEL_XEON_RAS After boot to Linux, the following will show in dmesg: HEST: Table parsing has been initialized Change-Id: If76b2af153616182cc053ca878f30fe056e9c8bd Signed-off-by: Rocky Phagura <rphagura@fb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52090 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/soc/intel/common')
-rw-r--r--src/soc/intel/common/block/acpi/acpi/globalnvs.asl1
-rw-r--r--src/soc/intel/common/block/include/intelblocks/nvs.h1
2 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/acpi/acpi/globalnvs.asl b/src/soc/intel/common/block/acpi/acpi/globalnvs.asl
index 161381f5e5..75215f8789 100644
--- a/src/soc/intel/common/block/acpi/acpi/globalnvs.asl
+++ b/src/soc/intel/common/block/acpi/acpi/globalnvs.asl
@@ -24,4 +24,5 @@ Field (GNVS, ByteAcc, NoLock, Preserve)
UIOR, 8, // 0x2f - UART debug controller init on S3 resume
A4GB, 64, // 0x30 - 0x37 Base of above 4GB MMIO Resource
A4GS, 64, // 0x38 - 0x3f Length of above 4GB MMIO Resource
+ , 8, // 0x40 - 0x48 Hest log buffer (used in SMM, not ASL code)
}
diff --git a/src/soc/intel/common/block/include/intelblocks/nvs.h b/src/soc/intel/common/block/include/intelblocks/nvs.h
index c98fa012d0..89b682e95e 100644
--- a/src/soc/intel/common/block/include/intelblocks/nvs.h
+++ b/src/soc/intel/common/block/include/intelblocks/nvs.h
@@ -26,6 +26,7 @@ struct __packed global_nvs {
u8 uior; /* 0x2f - UART debug controller init on S3 resume */
u64 a4gb; /* 0x30 - 0x37 Base of above 4GB MMIO Resource */
u64 a4gs; /* 0x38 - 0x3f Length of above 4GB MMIO Resource */
+ u64 hest_log_addr; /* 0x40 - 48 err log addr (used in SMM, not ASL code) */
};
#endif