diff options
| author | Kein Yuan <kein.yuan@intel.com> | 2014-02-11 17:40:31 -0800 |
|---|---|---|
| committer | Marc Jones <marc.jones@se-eng.com> | 2015-04-06 19:06:37 +0200 |
| commit | d3b40bfc2d419906df49647492dc601aea181730 (patch) | |
| tree | 64dd3c37963344de835ca42a0722ac56bf219b28 /src/soc/intel/common | |
| parent | 2088571f56bc36a6917193706e0f4d8ec1ba5b4b (diff) | |
baytrail: Fix hdmi audio choppy issue
Disable VC setting for HDA so hdmi audio choppy issue will be eliminated.
Change HDA initialize steps to sync with UEFI reference code.
BUG=chrome-os-partner:25651
BRANCH=Baytrail
TEST=Does not have choppy noise during video playing
Original-Signed-off-by: Kein Yuan <kein.yuan@intel.com>
Original-Change-Id: I45d49123d369b7d075776215e709af5801ea696d
Original-Reviewed-on: https://chromium-review.googlesource.com/186024
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-by: Benson Leung <bleung@chromium.org>
Original-Tested-by: Benson Leung <bleung@chromium.org>
Original-Commit-Queue: Bernie Thompson <bhthompson@chromium.org>
(cherry picked from commit 9f725a40f77cd684b2e230bd226d78d87b56e73b)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: I4fc10a161e5996e14d4823491fb62a7beff39bcc
Reviewed-on: http://review.coreboot.org/9297
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/intel/common')
| -rw-r--r-- | src/soc/intel/common/hda_verb.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/src/soc/intel/common/hda_verb.c b/src/soc/intel/common/hda_verb.c index bd61ceeca4..2523b41000 100644 --- a/src/soc/intel/common/hda_verb.c +++ b/src/soc/intel/common/hda_verb.c @@ -70,6 +70,19 @@ int hda_codec_detect(u8 *base) /* Write back the value once reset bit is set. */ write16(base + HDA_GCAP_REG, read16(base + HDA_GCAP_REG)); + /* Clear the "State Change Status Register" STATESTS bits + * for each of the "SDIN Stat Change Status Flag" + */ + write8(base + HDA_STATESTS_REG, 0xf); + + /* Turn off the link and poll RESET# bit until it reads back as 0 */ + if (set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, ~HDA_GCTL_CRST) < 0) + goto no_codec; + + /* Turn on the link and poll RESET# bit until it reads back as 1 */ + if (set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, HDA_GCTL_CRST) < 0) + goto no_codec; + /* Read in Codec location (BAR + 0xe)[2..0]*/ reg8 = read8(base + HDA_STATESTS_REG); reg8 &= 0x0f; |