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authorElyes HAOUAS <ehaouas@noos.fr>2020-06-27 07:17:16 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-06-30 05:58:08 +0000
commitbda27cd336a784d6ac55b2eb8af2635b26545fc4 (patch)
tree0c11a4b0c20cb24d3fbc49f7bc66e07e5e855b6f /src/soc/intel/common
parente8d230d65d9cba20da77d0c5d200edf40286e09d (diff)
src: Remove whitespaces before tabs
Change-Id: I73695152ec8d8ab2dabf8421ef2405f70de0f4ba Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42795 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Frans Hendriks <fhendriks@eltan.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common')
-rw-r--r--src/soc/intel/common/acpi/lpit.asl2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/common/acpi/lpit.asl b/src/soc/intel/common/acpi/lpit.asl
index b81275e224..348ae5612c 100644
--- a/src/soc/intel/common/acpi/lpit.asl
+++ b/src/soc/intel/common/acpi/lpit.asl
@@ -69,7 +69,7 @@ Scope(\_SB)
/*
* Save the current PM bits then
* enable GPIO PM with MISCCFG_ENABLE_GPIO_PM_CONFIG
- */
+ */
If (CondRefOf (\_SB.PCI0.EGPM))
{
\_SB.PCI0.EGPM ()