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authorMichael Niewöhner <foss@mniewoehner.de>2021-10-18 19:54:21 +0200
committerFelix Singer <felixsinger@posteo.net>2021-10-20 15:42:51 +0000
commitbc5f51fa56166e6c2dff273fefba4f3ea7e8bac2 (patch)
tree90ad1300c26ebcdee06ba0dbfb4d85b817e7cbe5 /src/soc/intel/common
parente874375394f81eddeb7f9a89e1351cb71c43670c (diff)
soc/intel/{skl,apl}: don't run or even include SGX code if disabled
Do not run or include any code in case the user did not explicitly enable SGX through `SOC_INTEL_COMMON_BLOCK_SGX_ENABLE`. Also move the ifdef inside the ASL file. Change-Id: Iec4d3d3eb2811ec14d29aff9601ba325724bc28c Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58426 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Singer <felixsinger@posteo.net>
Diffstat (limited to 'src/soc/intel/common')
-rw-r--r--src/soc/intel/common/acpi/sgx.asl2
-rw-r--r--src/soc/intel/common/block/sgx/Makefile.inc2
2 files changed, 3 insertions, 1 deletions
diff --git a/src/soc/intel/common/acpi/sgx.asl b/src/soc/intel/common/acpi/sgx.asl
index c0b8040729..9aea7a8b09 100644
--- a/src/soc/intel/common/acpi/sgx.asl
+++ b/src/soc/intel/common/acpi/sgx.asl
@@ -1,5 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
+#if CONFIG(SOC_INTEL_COMMON_BLOCK_SGX_ENABLE)
Scope(\_SB)
{
// Secure Enclave memory
@@ -54,3 +55,4 @@ Scope(\_SB)
} // end EPC Device
} // End of Scope(\_SB)
+#endif
diff --git a/src/soc/intel/common/block/sgx/Makefile.inc b/src/soc/intel/common/block/sgx/Makefile.inc
index 3fa18d8873..ce3c436141 100644
--- a/src/soc/intel/common/block/sgx/Makefile.inc
+++ b/src/soc/intel/common/block/sgx/Makefile.inc
@@ -1 +1 @@
-ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SGX) += sgx.c
+ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE) += sgx.c