diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2020-09-19 13:20:58 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2020-09-21 16:03:16 +0000 |
| commit | 77cc3267fc970c710299a164ecbc471f9287d719 (patch) | |
| tree | 9e60471abf75ff30b740d055b97c8159fe78d75f /src/soc/intel/common | |
| parent | e49ce2604fe93d4b2147fd82d86c3a9e629c336c (diff) | |
soc/intel: Refactor do_global_reset() function
List of changes:
1. Rename do_global_reset() to force_global_reset()
2. Make force_global_reset() function static
3. Implement force_global_reset() into common/reset.c to avoid
dedicated SoC implementation
4. Remove redundant force_global_reset() implementation from
dedicated SoC
5. Make direct call to global_reset() from cse_lite.c
7. Drop CONFIG_HAVE_CF9_RESET_PREPARE Kconfig from APL SoC due
to common reset (soc/intel/common/reset.c) code migration
8. Remove unused function send_global_reset() from SKL me.c due
to common reset code migration
9. Delete heci.c from APL SoC as unused
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Change-Id: I1c5dc8d5606ef28ffaed4a64d90f470ae1ffc2a6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45541
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/common')
| -rw-r--r-- | src/soc/intel/common/block/cse/cse_lite.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/common/reset.c | 21 | ||||
| -rw-r--r-- | src/soc/intel/common/reset.h | 9 |
3 files changed, 22 insertions, 10 deletions
diff --git a/src/soc/intel/common/block/cse/cse_lite.c b/src/soc/intel/common/block/cse/cse_lite.c index c9e4e1f470..e595b998ed 100644 --- a/src/soc/intel/common/block/cse/cse_lite.c +++ b/src/soc/intel/common/block/cse/cse_lite.c @@ -384,7 +384,7 @@ static bool cse_set_and_boot_from_next_bp(enum boot_partition_id bp) cse_board_reset(); /* If board does not perform the reset, then perform global_reset */ - do_global_reset(); + global_reset(); die("cse_lite: Failed to reset the system\n"); diff --git a/src/soc/intel/common/reset.c b/src/soc/intel/common/reset.c index c6c394bd44..ca31897c12 100644 --- a/src/soc/intel/common/reset.c +++ b/src/soc/intel/common/reset.c @@ -4,16 +4,35 @@ #include <cf9_reset.h> #include <console/console.h> #include <halt.h> +#include <intelblocks/cse.h> +#include <intelblocks/pmclib.h> #include <reset.h> #include "reset.h" +static void force_global_reset(void) +{ + /* Ask CSE to do the global reset */ + if (CONFIG(SOC_INTEL_COMMON_BLOCK_CSE)) + if (cse_request_global_reset()) + return; + + /* + * If ME is unable to reset platform then enable the PMC CF9GR register [B0:D31:F2 + * register offset 0xAC bit 20] and force a global reset by writing 0x06 or 0x0E. + */ + if (CONFIG(SOC_INTEL_COMMON_BLOCK_PMC)) + pmc_global_reset_enable(true); + /* Now BIOS can write 0x06 or 0x0E to 0xCF9 port to global reset platform */ + do_full_reset(); +} + void global_reset(void) { printk(BIOS_INFO, "%s() called!\n", __func__); cf9_reset_prepare(); dcache_clean_all(); - do_global_reset(); + force_global_reset(); halt(); } diff --git a/src/soc/intel/common/reset.h b/src/soc/intel/common/reset.h index e1f6aabbf6..bf8d651f06 100644 --- a/src/soc/intel/common/reset.h +++ b/src/soc/intel/common/reset.h @@ -3,14 +3,7 @@ #ifndef _INTEL_COMMON_RESET_H_ #define _INTEL_COMMON_RESET_H_ -/* - * Implement SoC specific global reset (i.e. a reset of both host and - * ME partitions). Usually the ME is asked to perform the reset first. - * If that doesn't work out, fall back to a manual global reset. - */ -void do_global_reset(void); - -/* Prepare for reset, run do_global_reset(), halt. */ +/* Prepare for reset, run force_global_reset(), halt. */ __noreturn void global_reset(void); #endif /* _INTEL_COMMON_RESET_H_ */ |