diff options
| author | Michael Niewöhner <foss@mniewoehner.de> | 2021-09-27 18:45:10 +0200 |
|---|---|---|
| committer | Michael Niewöhner <foss@mniewoehner.de> | 2021-10-17 13:57:53 +0000 |
| commit | 6eaffcdbb13b13aad20a4ea0f06f361432daf713 (patch) | |
| tree | 2ffbb6a747f34f86088f6acf3eab48200366e687 /src/soc/intel/common | |
| parent | 01b3c40bfef5f5789a8521da766be8792eeb06c2 (diff) | |
soc/intel: implement ACPI timer disabling per SoC and drop common code
Since it's just a one-liner, implement disabling of the ACPI timer in
soc code. This reduces complexity.
Change-Id: I434ea87d00f6e919983d9229f79d4adb352fbf27
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58020
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/intel/common')
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/pmclib.h | 3 | ||||
| -rw-r--r-- | src/soc/intel/common/block/pmc/Kconfig | 6 | ||||
| -rw-r--r-- | src/soc/intel/common/block/pmc/pmclib.c | 9 |
3 files changed, 0 insertions, 18 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/pmclib.h b/src/soc/intel/common/block/include/intelblocks/pmclib.h index 4972a09f8b..bb38204718 100644 --- a/src/soc/intel/common/block/include/intelblocks/pmclib.h +++ b/src/soc/intel/common/block/include/intelblocks/pmclib.h @@ -251,9 +251,6 @@ void pmc_set_power_failure_state(bool target_on); uint8_t get_pm_pwr_cyc_dur(uint8_t slp_s4_min_assert, uint8_t slp_s3_min_assert, uint8_t slp_a_min_assert, uint8_t pm_pwr_cyc_dur); -/* Disabling ACPI PM timer to ensure switches off TCO and necessary of XTAL OSC shutdown */ -void pmc_disable_acpi_timer(void); - /* API to set ACPI mode */ void pmc_set_acpi_mode(void); diff --git a/src/soc/intel/common/block/pmc/Kconfig b/src/soc/intel/common/block/pmc/Kconfig index 5e5e8d6184..f60dc69692 100644 --- a/src/soc/intel/common/block/pmc/Kconfig +++ b/src/soc/intel/common/block/pmc/Kconfig @@ -50,12 +50,6 @@ config PMC_GLOBAL_RESET_ENABLE_LOCK Note that the reset register is still at 0xCF9 this only controls the enable and lock feature. -config PMC_LOW_POWER_MODE_PROGRAM - bool - help - Enable this for PMC devices to perform registers programming - to ensure low power in active idle scenario. - config PM_ACPI_TIMER_OPTIONAL bool default n diff --git a/src/soc/intel/common/block/pmc/pmclib.c b/src/soc/intel/common/block/pmc/pmclib.c index 6c756b1590..f7efeb78da 100644 --- a/src/soc/intel/common/block/pmc/pmclib.c +++ b/src/soc/intel/common/block/pmc/pmclib.c @@ -711,15 +711,6 @@ uint8_t get_pm_pwr_cyc_dur(uint8_t slp_s4_min_assert, uint8_t slp_s3_min_assert, return PCH_PM_PWR_CYC_DUR; } -#if CONFIG(PMC_LOW_POWER_MODE_PROGRAM) -void pmc_disable_acpi_timer(void) -{ - uint8_t *pmcbase = pmc_mmio_regs(); - - setbits8(pmcbase + PCH_PWRM_ACPI_TMR_CTL, ACPI_TIM_DIS); -} -#endif /* PMC_LOW_POWER_MODE_PROGRAM */ - void pmc_set_acpi_mode(void) { if (!CONFIG(NO_SMM) && !acpi_is_wakeup_s3()) { |