diff options
| author | Karthikeyan Ramasubramanian <kramasub@chromium.org> | 2019-07-03 13:02:37 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-07-19 17:13:50 +0000 |
| commit | 0f718312f1b57ec300b7486c95e53562be5a2325 (patch) | |
| tree | a9a224c621433a8e6af62c4d31f73011d263c145 /src/soc/intel/common | |
| parent | a260215a644f0f13b60c08b1a9d55d3567a380b1 (diff) | |
soc/intel/common: Add SOC specific function to get XHCI USB info
It feels appropriate to define SoC specific XHCI USB info in SoC
specific XHCI source file and an API to get that information instead of
defining it in elog source file. This will help in other situations
where the information is required.
BUG=None
BRANCH=None
TEST=Boot to ChromeOS.
Change-Id: Ie63a29a7096bfcaab87baaae947b786ab2345ed1
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34290
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common')
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/xhci.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/xhci.h b/src/soc/intel/common/block/include/intelblocks/xhci.h index 86b598fda1..492c32a002 100644 --- a/src/soc/intel/common/block/include/intelblocks/xhci.h +++ b/src/soc/intel/common/block/include/intelblocks/xhci.h @@ -46,4 +46,14 @@ bool pch_xhci_update_wake_event(const struct xhci_usb_info *info); void soc_xhci_init(struct device *dev); +/** + * soc_get_xhci_usb_info() - Get the information about USB2 & USB3 ports. + * + * This function is used to get USB ports and status register offset information + * within a XHCI controller. + * + * Return: USB ports and status register offset info for the SoC. + */ +const struct xhci_usb_info *soc_get_xhci_usb_info(void); + #endif /* SOC_INTEL_COMMON_BLOCK_XHCI_H */ |