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authorFurquan Shaikh <furquan@google.com>2020-09-21 22:44:27 +0000
committerSubrata Banik <subrata.banik@intel.com>2020-09-22 05:13:39 +0000
commitb13bd1efcf568bb220500ca94e4de097f3bed9ec (patch)
tree498a45a955bbd97da0995a966e9356ae6236ce94 /src/soc/intel/common
parent5bd4adf542abea433c98c72f7423762109412d4d (diff)
Revert "soc/intel: Refactor do_global_reset() function"
This reverts commit 77cc3267fc970c710299a164ecbc471f9287d719. Reason for revert: Breaks quark and also needs breaking down into multiple CLs as commented by Nico on CB:45541 Change-Id: Idf4ca74158df15483856754ee24cc4472a8e09b0 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44997 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src/soc/intel/common')
-rw-r--r--src/soc/intel/common/block/cse/cse_lite.c2
-rw-r--r--src/soc/intel/common/reset.c21
-rw-r--r--src/soc/intel/common/reset.h9
3 files changed, 10 insertions, 22 deletions
diff --git a/src/soc/intel/common/block/cse/cse_lite.c b/src/soc/intel/common/block/cse/cse_lite.c
index e595b998ed..c9e4e1f470 100644
--- a/src/soc/intel/common/block/cse/cse_lite.c
+++ b/src/soc/intel/common/block/cse/cse_lite.c
@@ -384,7 +384,7 @@ static bool cse_set_and_boot_from_next_bp(enum boot_partition_id bp)
cse_board_reset();
/* If board does not perform the reset, then perform global_reset */
- global_reset();
+ do_global_reset();
die("cse_lite: Failed to reset the system\n");
diff --git a/src/soc/intel/common/reset.c b/src/soc/intel/common/reset.c
index ca31897c12..c6c394bd44 100644
--- a/src/soc/intel/common/reset.c
+++ b/src/soc/intel/common/reset.c
@@ -4,35 +4,16 @@
#include <cf9_reset.h>
#include <console/console.h>
#include <halt.h>
-#include <intelblocks/cse.h>
-#include <intelblocks/pmclib.h>
#include <reset.h>
#include "reset.h"
-static void force_global_reset(void)
-{
- /* Ask CSE to do the global reset */
- if (CONFIG(SOC_INTEL_COMMON_BLOCK_CSE))
- if (cse_request_global_reset())
- return;
-
- /*
- * If ME is unable to reset platform then enable the PMC CF9GR register [B0:D31:F2
- * register offset 0xAC bit 20] and force a global reset by writing 0x06 or 0x0E.
- */
- if (CONFIG(SOC_INTEL_COMMON_BLOCK_PMC))
- pmc_global_reset_enable(true);
- /* Now BIOS can write 0x06 or 0x0E to 0xCF9 port to global reset platform */
- do_full_reset();
-}
-
void global_reset(void)
{
printk(BIOS_INFO, "%s() called!\n", __func__);
cf9_reset_prepare();
dcache_clean_all();
- force_global_reset();
+ do_global_reset();
halt();
}
diff --git a/src/soc/intel/common/reset.h b/src/soc/intel/common/reset.h
index bf8d651f06..e1f6aabbf6 100644
--- a/src/soc/intel/common/reset.h
+++ b/src/soc/intel/common/reset.h
@@ -3,7 +3,14 @@
#ifndef _INTEL_COMMON_RESET_H_
#define _INTEL_COMMON_RESET_H_
-/* Prepare for reset, run force_global_reset(), halt. */
+/*
+ * Implement SoC specific global reset (i.e. a reset of both host and
+ * ME partitions). Usually the ME is asked to perform the reset first.
+ * If that doesn't work out, fall back to a manual global reset.
+ */
+void do_global_reset(void);
+
+/* Prepare for reset, run do_global_reset(), halt. */
__noreturn void global_reset(void);
#endif /* _INTEL_COMMON_RESET_H_ */