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authorBarnali Sarkar <barnali.sarkar@intel.com>2017-06-05 20:01:14 +0530
committerAaron Durbin <adurbin@chromium.org>2017-06-09 19:27:14 +0200
commit9e55ff6a879ee6eb96988e52020c4c20a4898c4f (patch)
treea002c8c99a306cc25b0e8de5622af646aee76535 /src/soc/intel/common
parentf004f66ca7b0c428c04d6025738319187cf911fe (diff)
soc/intel/apollolake: Rename ACPI Base Address and Size Macro
Rename these two Macros to help use Common Code - ACPI_PMIO_BASE --> ACPI_BASE_ADDRESS ACPI_PMIO_SIZE --> ACPI_BASE_SIZE Change-Id: I21125b7206c241692cfdf1cdb10b8b3dee62b24a Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com> Reviewed-on: https://review.coreboot.org/20038 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common')
-rw-r--r--src/soc/intel/common/smihandler.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/common/smihandler.c b/src/soc/intel/common/smihandler.c
index 549a914813..88ea819012 100644
--- a/src/soc/intel/common/smihandler.c
+++ b/src/soc/intel/common/smihandler.c
@@ -135,7 +135,7 @@ void southbridge_smi_sleep(const struct smm_save_state_ops *save_state_ops)
/* First, disable further SMIs */
disable_smi(SLP_SMI_EN);
/* Figure out SLP_TYP */
- reg32 = inl(ACPI_PMIO_BASE + PM1_CNT);
+ reg32 = inl(ACPI_BASE_ADDRESS + PM1_CNT);
printk(BIOS_SPEW, "SMI#: SLP = 0x%08x\n", reg32);
slp_typ = acpi_sleep_from_pm1(reg32);
@@ -198,7 +198,7 @@ void southbridge_smi_sleep(const struct smm_save_state_ops *save_state_ops)
* the line above. However, if we entered sleep state S1 and wake
* up again, we will continue to execute code in this function.
*/
- reg32 = inl(ACPI_PMIO_BASE + PM1_CNT);
+ reg32 = inl(ACPI_BASE_ADDRESS + PM1_CNT);
if (reg32 & SCI_EN) {
/* The OS is not an ACPI OS, so we set the state to S0 */
disable_pm1_control(SLP_EN | SLP_TYP);