diff options
author | Sridhar Siricilla <sridhar.siricilla@intel.com> | 2020-12-09 00:28:30 +0530 |
---|---|---|
committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2020-12-14 16:12:52 +0000 |
commit | 4c2890d47ef03e5c638a9ac81d14cf3755f64cfc (patch) | |
tree | ac74a225b2d0d6be2bca28a660e7ac33492313f7 /src/soc/intel/common | |
parent | abeb688154d9be5487403a65a74c8c24d380b3bf (diff) |
soc/inte/common: Replace #if macro with if C-language constuct
This patch modifies CSE Lite driver to use 'if' C-lanugage construct
instead of #if macro and adds 'if SOC_INTEL_CSE_RW_UPDATE' to the prompts
of CSE Update related KConfigs to prevent appearing them in the menu.
TEST=Built the code for drawcia
Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Change-Id: Iecd5cf56ecd280de920f479e174762fe6b4164b0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48494
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/common')
-rw-r--r-- | src/soc/intel/common/block/cse/Kconfig | 18 | ||||
-rw-r--r-- | src/soc/intel/common/block/cse/cse_lite.c | 14 |
2 files changed, 13 insertions, 19 deletions
diff --git a/src/soc/intel/common/block/cse/Kconfig b/src/soc/intel/common/block/cse/Kconfig index d3b7288a81..fec112b767 100644 --- a/src/soc/intel/common/block/cse/Kconfig +++ b/src/soc/intel/common/block/cse/Kconfig @@ -29,50 +29,46 @@ config SOC_INTEL_CSE_RW_UPDATE This config will enable CSE RW firmware update feature and also will be used ensure all the required configs are provided by mainboard. -if SOC_INTEL_CSE_RW_UPDATE config SOC_INTEL_CSE_FMAP_NAME - string "Name of CSE Region in FMAP" + string "Name of CSE Region in FMAP" if SOC_INTEL_CSE_RW_UPDATE default "SI_ME" help Name of CSE region in FMAP config SOC_INTEL_CSE_RW_A_FMAP_NAME - string "Location of CSE RW A in FMAP" - depends on SOC_INTEL_CSE_LITE_SKU + string "Location of CSE RW A in FMAP" if SOC_INTEL_CSE_RW_UPDATE default "ME_RW_A" help Name of CSE RW A region in FMAP config SOC_INTEL_CSE_RW_B_FMAP_NAME - string "Location of CSE RW B in FMAP" - depends on SOC_INTEL_CSE_LITE_SKU + string "Location of CSE RW B in FMAP" if SOC_INTEL_CSE_RW_UPDATE default "ME_RW_B" help Name of CSE RW B region in FMAP config SOC_INTEL_CSE_RW_CBFS_NAME - string "CBFS entry name for CSE RW blob" + string "CBFS entry name for CSE RW blob" if SOC_INTEL_CSE_RW_UPDATE default "me_rw" help CBFS entry name for Intel CSE CBFS RW blob config SOC_INTEL_CSE_RW_METADATA_CBFS_NAME - string "CBFS name for CSE RW metadata file" + string "CBFS name for CSE RW metadata file" if SOC_INTEL_CSE_RW_UPDATE default "me_rw.metadata" help CBFS name for Intel CSE CBFS RW metadata file config SOC_INTEL_CSE_RW_FILE - string "Intel CSE CBFS RW path and filename" + string "Intel CSE CBFS RW path and filename" if SOC_INTEL_CSE_RW_UPDATE default "" help Intel CSE CBFS RW blob path and file name config SOC_INTEL_CSE_RW_VERSION - string "Intel CSE RW firmware version" + string "Intel CSE RW firmware version" if SOC_INTEL_CSE_RW_UPDATE default "" help This config contains the Intel CSE RW version of the blob that is provided by SOC_INTEL_CSE_RW_FILE config and the version must be set in the format major.minor.hotfix.build (ex: 14.0.40.1209). -endif diff --git a/src/soc/intel/common/block/cse/cse_lite.c b/src/soc/intel/common/block/cse/cse_lite.c index 8e89723334..1d261eaf36 100644 --- a/src/soc/intel/common/block/cse/cse_lite.c +++ b/src/soc/intel/common/block/cse/cse_lite.c @@ -429,7 +429,6 @@ static bool cse_fix_data_failure_err(const struct cse_bp_info *cse_bp_info) return cse_boot_to_rw(cse_bp_info); } -#if CONFIG(SOC_INTEL_CSE_RW_UPDATE) static const struct fw_version *cse_get_bp_entry_version(enum boot_partition_id bp, const struct cse_bp_info *bp_info) { @@ -775,7 +774,6 @@ static uint8_t cse_fw_update(const struct cse_bp_info *cse_bp_info) return 0; } -#endif void cse_fw_sync(void *unused) { @@ -804,12 +802,12 @@ void cse_fw_sync(void *unused) * If SOC_INTEL_CSE_RW_UPDATE is defined , then trigger CSE firmware update. The driver * triggers recovery if CSE CBFS RW metadata or CSE CBFS RW blob is not available. */ -#if CONFIG(SOC_INTEL_CSE_RW_UPDATE) - uint8_t rv; - rv = cse_fw_update(&cse_bp_info.bp_info); - if (rv) - cse_trigger_recovery(rv); -#endif + if (CONFIG(SOC_INTEL_CSE_RW_UPDATE)) { + uint8_t rv; + rv = cse_fw_update(&cse_bp_info.bp_info); + if (rv) + cse_trigger_recovery(rv); + } if (!cse_boot_to_rw(&cse_bp_info.bp_info)) { printk(BIOS_ERR, "cse_lite: Failed to switch to RW\n"); |