ACPI: Drop typedef global_nvs_t

Bring all GNVS related initialisation function to global
scope to force identical signatures. Followup work is
likely to remove some as duplicates.

Change-Id: Id4299c41d79c228f3d35bc7cb9bf427ce1e82ba1
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42489
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

14 files changed, 22 insertions, 38 deletions

diff --git a/src/soc/intel/common/acpi_wake_source.c b/src/soc/intel/common/acpi_wake_source.c
index 1342c80ebd..f30ef9f0db 100644
--- a/src/soc/intel/common/acpi_wake_source.c
+++ b/src/soc/intel/common/acpi_wake_source.c
@@ -16,7 +16,7 @@ __weak int soc_fill_acpi_wake(uint32_t *pm1, uint32_t **gpe0)
 /* Save wake source data for ACPI _SWS methods in NVS */
 static void acpi_save_wake_source(void *unused)
 {
-	global_nvs_t *gnvs = acpi_get_gnvs();
+	struct global_nvs *gnvs = acpi_get_gnvs();
 	uint32_t pm1, *gpe0;
 	int gpe_reg, gpe_reg_count;
 	int reg_size = sizeof(uint32_t) * 8;
diff --git a/src/soc/intel/common/block/acpi/acpi.c b/src/soc/intel/common/block/acpi/acpi.c
index 3265131f93..5e4c6e8e4c 100644
--- a/src/soc/intel/common/block/acpi/acpi.c
+++ b/src/soc/intel/common/block/acpi/acpi.c
@@ -222,13 +222,13 @@ static int acpi_fill_wake(uint32_t *pm1, uint32_t **gpe0)
 }
 #endif
 
-__weak void acpi_create_gnvs(struct global_nvs_t *gnvs)
+__weak void acpi_create_gnvs(struct global_nvs *gnvs)
 {
 }
 
 void southbridge_inject_dsdt(const struct device *device)
 {
-	struct global_nvs_t *gnvs;
+	struct global_nvs *gnvs;
 
 	gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);
 	if (!gnvs) {
@@ -457,7 +457,7 @@ void generate_cpu_entries(const struct device *device)
 /* Save wake source data for ACPI _SWS methods in NVS */
 static void acpi_save_wake_source(void *unused)
 {
-	global_nvs_t *gnvs = acpi_get_gnvs();
+	struct global_nvs *gnvs = acpi_get_gnvs();
 	uint32_t pm1, *gpe0;
 	int gpe_reg, gpe_reg_count;
 	int reg_size = sizeof(uint32_t) * 8;
diff --git a/src/soc/intel/common/block/include/intelblocks/acpi.h b/src/soc/intel/common/block/include/intelblocks/acpi.h
index 19dd68af6c..21664c8716 100644
--- a/src/soc/intel/common/block/include/intelblocks/acpi.h
+++ b/src/soc/intel/common/block/include/intelblocks/acpi.h
@@ -12,7 +12,7 @@
 struct chipset_power_state;
 
 /* Forward  declare the global nvs structure here */
-struct global_nvs_t;
+struct global_nvs;
 
 /* Return ACPI name for this device */
 const char *soc_acpi_name(const struct device *dev);
@@ -32,19 +32,6 @@ unsigned long southbridge_write_acpi_tables(const struct device *device,
 					    struct acpi_rsdp *rsdp);
 
 /*
- * Creates acpi gnvs and adds it to the DSDT table.
- * GNVS creation is chipset specific and is done in soc specific acpi.c file.
- */
-void southbridge_inject_dsdt(const struct device *device);
-
-/*
- * This function populates the gnvs structure in acpi table.
- * Defined as weak in common acpi as gnvs structure definition is
- * chipset specific.
- */
-void acpi_create_gnvs(struct global_nvs_t *gnvs);
-
-/*
  * get_cstate_map returns a table of processor specific acpi_cstate_t entries
  * and number of entries in the table
  */
diff --git a/src/soc/intel/common/block/include/intelblocks/nvs.h b/src/soc/intel/common/block/include/intelblocks/nvs.h
index e1040eac3c..cc240c5760 100644
--- a/src/soc/intel/common/block/include/intelblocks/nvs.h
+++ b/src/soc/intel/common/block/include/intelblocks/nvs.h
@@ -6,7 +6,7 @@
 #include <commonlib/helpers.h>
 #include <vendorcode/google/chromeos/gnvs.h>
 
-typedef struct global_nvs_t {
+struct __packed global_nvs {
 	/* Miscellaneous */
 	u16	osys; /* 0x00 - 0x01 Operating System */
 	u8	smif; /* 0x02 - SMI function call ("TRAP") */
@@ -31,7 +31,8 @@ typedef struct global_nvs_t {
 
 	/* ChromeOS specific (0x100 - 0xfff) */
 	chromeos_acpi_t	chromeos;
-}  __packed global_nvs_t;
-check_member(global_nvs_t, chromeos, GNVS_CHROMEOS_ACPI_OFFSET);
+};
+
+check_member(global_nvs, chromeos, GNVS_CHROMEOS_ACPI_OFFSET);
 
 #endif
diff --git a/src/soc/intel/common/block/include/intelblocks/sgx.h b/src/soc/intel/common/block/include/intelblocks/sgx.h
index e6c99057c2..56e4a167b5 100644
--- a/src/soc/intel/common/block/include/intelblocks/sgx.h
+++ b/src/soc/intel/common/block/include/intelblocks/sgx.h
@@ -18,6 +18,6 @@ void prmrr_core_configure(void);
 void sgx_configure(void *unused);
 
 /* Fill GNVS data with SGX status, EPC base and length */
-void sgx_fill_gnvs(global_nvs_t *gnvs);
+void sgx_fill_gnvs(struct global_nvs *gnvs);
 
 #endif	/* SOC_INTEL_COMMON_BLOCK_SGX_H */
diff --git a/src/soc/intel/common/block/include/intelblocks/smihandler.h b/src/soc/intel/common/block/include/intelblocks/smihandler.h
index 428a9f35b1..7cea1dd1ab 100644
--- a/src/soc/intel/common/block/include/intelblocks/smihandler.h
+++ b/src/soc/intel/common/block/include/intelblocks/smihandler.h
@@ -7,7 +7,7 @@
 #include <stdint.h>
 
 struct gpi_status;
-struct global_nvs_t;
+struct global_nvs;
 
 /*
  * The register value is used with get_reg and set_reg
@@ -127,11 +127,6 @@ void smihandler_southbridge_gpi(
 void smihandler_southbridge_espi(
 	const struct smm_save_state_ops *save_state_ops);
 
-/*
- * Returns gnvs pointer within SMM context
- */
-struct global_nvs_t *smm_get_gnvs(void);
-
 /* SoC overrides. */
 
 /* Specific SOC SMI handler during ramstage finalize phase */
diff --git a/src/soc/intel/common/block/include/intelblocks/systemagent.h b/src/soc/intel/common/block/include/intelblocks/systemagent.h
index ae7211697e..cf5613853e 100644
--- a/src/soc/intel/common/block/include/intelblocks/systemagent.h
+++ b/src/soc/intel/common/block/include/intelblocks/systemagent.h
@@ -71,7 +71,7 @@ uintptr_t sa_get_tseg_base(void);
 /* API to get TSEG size */
 size_t sa_get_tseg_size(void);
 /* Fill MMIO resource above 4GB into GNVS */
-void sa_fill_gnvs(global_nvs_t *gnvs);
+void sa_fill_gnvs(struct global_nvs *gnvs);
 /*
  * SoC overrides
  *
diff --git a/src/soc/intel/common/block/lpc/lpc.c b/src/soc/intel/common/block/lpc/lpc.c
index 9fe48d1f87..ea85911732 100644
--- a/src/soc/intel/common/block/lpc/lpc.c
+++ b/src/soc/intel/common/block/lpc/lpc.c
@@ -1,5 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
+#include <acpi/acpi_gnvs.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
diff --git a/src/soc/intel/common/block/sgx/sgx.c b/src/soc/intel/common/block/sgx/sgx.c
index 56648c81ea..8679f1f011 100644
--- a/src/soc/intel/common/block/sgx/sgx.c
+++ b/src/soc/intel/common/block/sgx/sgx.c
@@ -235,7 +235,7 @@ void sgx_configure(void *unused)
 		activate_sgx();
 }
 
-void sgx_fill_gnvs(global_nvs_t *gnvs)
+void sgx_fill_gnvs(struct global_nvs *gnvs)
 {
 	struct cpuid_result cpuid_regs;
 
diff --git a/src/soc/intel/common/block/smm/smihandler.c b/src/soc/intel/common/block/smm/smihandler.c
index ab5e9c29da..73dfda5741 100644
--- a/src/soc/intel/common/block/smm/smihandler.c
+++ b/src/soc/intel/common/block/smm/smihandler.c
@@ -27,7 +27,7 @@
 #include <stdint.h>
 
 /* GNVS needs to be set by coreboot initiating a software SMI. */
-static struct global_nvs_t *gnvs;
+static struct global_nvs *gnvs;
 
 /* SoC overrides. */
 
@@ -125,7 +125,7 @@ void southbridge_smi_set_eos(void)
 	pmc_enable_smi(EOS);
 }
 
-struct global_nvs_t *smm_get_gnvs(void)
+struct global_nvs *smm_get_gnvs(void)
 {
 	return gnvs;
 }
@@ -380,7 +380,7 @@ void smihandler_southbridge_apmc(
 		if (state) {
 			/* EBX in the state save contains the GNVS pointer */
 			uint32_t reg_ebx = save_state_ops->get_reg(state, RBX);
-			gnvs = (struct global_nvs_t *)(uintptr_t)reg_ebx;
+			gnvs = (struct global_nvs *)(uintptr_t)reg_ebx;
 			smm_initialized = 1;
 			printk(BIOS_DEBUG, "SMI#: Setting GNVS to %p\n", gnvs);
 		}
diff --git a/src/soc/intel/common/block/smm/smitraphandler.c b/src/soc/intel/common/block/smm/smitraphandler.c
index 1e9f4d9c57..1d6fb816bb 100644
--- a/src/soc/intel/common/block/smm/smitraphandler.c
+++ b/src/soc/intel/common/block/smm/smitraphandler.c
@@ -24,7 +24,7 @@
 /* Inherited from cpu/x86/smm.h resulting in a different signature */
 int southbridge_io_trap_handler(int smif)
 {
-	global_nvs_t *gnvs = smm_get_gnvs();
+	struct global_nvs *gnvs = smm_get_gnvs();
 	switch (smif) {
 	case 0x32:
 		printk(BIOS_DEBUG, "OS Init\n");
@@ -61,7 +61,7 @@ void smihandler_southbridge_monitor(
 	u32 data, mask = 0;
 	u8 trap_sts;
 	int i;
-	global_nvs_t *gnvs = smm_get_gnvs();
+	struct global_nvs *gnvs = smm_get_gnvs();
 
 	/* TRSR - Trap Status Register */
 	trap_sts = pcr_read8(PID_PSTH, PCR_PSTH_TRPST);
diff --git a/src/soc/intel/common/block/systemagent/systemagent.c b/src/soc/intel/common/block/systemagent/systemagent.c
index d25e1aa46c..e6bbfc7d63 100644
--- a/src/soc/intel/common/block/systemagent/systemagent.c
+++ b/src/soc/intel/common/block/systemagent/systemagent.c
@@ -103,7 +103,7 @@ static void sa_read_map_entry(struct device *dev,
 }
 
 /* Fill MMIO resource above 4GB into GNVS */
-void sa_fill_gnvs(global_nvs_t *gnvs)
+void sa_fill_gnvs(struct global_nvs *gnvs)
 {
 	struct device *sa_dev = pcidev_path_on_root(SA_DEVFN_ROOT);
 
diff --git a/src/soc/intel/common/block/uart/uart.c b/src/soc/intel/common/block/uart/uart.c
index 0c641f3746..fac05775fa 100644
--- a/src/soc/intel/common/block/uart/uart.c
+++ b/src/soc/intel/common/block/uart/uart.c
@@ -167,7 +167,7 @@ static void uart_read_resources(struct device *dev)
  */
 static bool pch_uart_init_debug_controller_on_resume(void)
 {
-	global_nvs_t *gnvs = acpi_get_gnvs();
+	struct global_nvs *gnvs = acpi_get_gnvs();
 
 	if (gnvs)
 		return !!gnvs->uior;
diff --git a/src/soc/intel/common/nhlt.c b/src/soc/intel/common/nhlt.c
index 099be5d8bd..39baf016c2 100644
--- a/src/soc/intel/common/nhlt.c
+++ b/src/soc/intel/common/nhlt.c
@@ -13,7 +13,7 @@ uintptr_t nhlt_soc_serialize_oem_overrides(struct nhlt *nhlt,
 	uintptr_t acpi_addr, const char *oem_id, const char *oem_table_id,
 	uint32_t oem_revision)
 {
-	global_nvs_t *gnvs;
+	struct global_nvs *gnvs;
 
 	gnvs = acpi_get_gnvs();