diff options
| author | Furquan Shaikh <furquan@google.com> | 2020-12-23 14:11:00 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-01-08 08:23:59 +0000 |
| commit | e4f7e0405083b7a7725c0f042ed65d1488687b78 (patch) | |
| tree | 9fb223c571b681704fff5079cccfaf6c3663dc32 /src/soc/intel/common | |
| parent | 2136c5af5f46f8dc5645bafe8b1c8bcf9f46cd79 (diff) | |
soc/intel: Drop `dev` parameter from soc_get_gen_io_dec_range()
This change drops the parameter `struct device *dev` from the function
`soc_get_gen_io_dec_range()`. This function uses the parameter dev to
get a pointer to config structure for extracting the decode ranges
configured by mainboard in device tree. However, there is no separate
chip driver for the LPC device which means that the SoC code can use
`config_of_soc()` to get to SoC chip config instead of using the LPC
device.
This change is being done in preparation to clean up the device
tree/chip config access in early stages that allows for optimizing
the inclusion of device tree elements in the early stages.
Change-Id: I3ea53ddc771f592dd0ea5e5e809be2d2eff7f16d
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49209
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/soc/intel/common')
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/lpc_lib.h | 3 | ||||
| -rw-r--r-- | src/soc/intel/common/block/lpc/lpc_lib.c | 8 |
2 files changed, 2 insertions, 9 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/lpc_lib.h b/src/soc/intel/common/block/include/intelblocks/lpc_lib.h index 2fdcdef3e6..82cba8ec7f 100644 --- a/src/soc/intel/common/block/include/intelblocks/lpc_lib.h +++ b/src/soc/intel/common/block/include/intelblocks/lpc_lib.h @@ -98,8 +98,7 @@ void lpc_io_setup_comm_a_b(void); /* Enable PCH LPC by setting up generic decode range registers. */ void pch_enable_lpc(void); /* Get SoC's generic IO decoder range register settings. */ -void soc_get_gen_io_dec_range(const struct device *dev, - uint32_t gen_io_dec[LPC_NUM_GENERIC_IO_RANGES]); +void soc_get_gen_io_dec_range(uint32_t gen_io_dec[LPC_NUM_GENERIC_IO_RANGES]); /* Mirror generic IO decoder range register settings into DMI PCR. */ void soc_setup_dmi_pcr_io_dec(uint32_t gen_io_dec[LPC_NUM_GENERIC_IO_RANGES]); /* Add resource into LPC PCI device space */ diff --git a/src/soc/intel/common/block/lpc/lpc_lib.c b/src/soc/intel/common/block/lpc/lpc_lib.c index 67dd661460..d050ee36e5 100644 --- a/src/soc/intel/common/block/lpc/lpc_lib.c +++ b/src/soc/intel/common/block/lpc/lpc_lib.c @@ -270,15 +270,9 @@ static void lpc_set_gen_decode_range( void pch_enable_lpc(void) { - /* Lookup device tree in romstage */ - const struct device *dev; uint32_t gen_io_dec[LPC_NUM_GENERIC_IO_RANGES]; - dev = pcidev_on_root(PCH_DEV_SLOT_LPC, 0); - if (!dev) - return; - - soc_get_gen_io_dec_range(dev, gen_io_dec); + soc_get_gen_io_dec_range(gen_io_dec); lpc_set_gen_decode_range(gen_io_dec); soc_setup_dmi_pcr_io_dec(gen_io_dec); if (ENV_PAYLOAD_LOADER) |