diff options
author | Jeremy Compostella <jeremy.compostella@intel.com> | 2023-01-19 19:06:09 -0700 |
---|---|---|
committer | Nick Vaccaro <nvaccaro@google.com> | 2023-01-26 16:55:00 +0000 |
commit | a2a7fecabf51350d1fb2e2435b081aa3774dffbf (patch) | |
tree | ae010372db232cfde5befe68a2bd6b1ac3e84731 /src/soc/intel/common | |
parent | b628beca3428731b6ea43218caa27bdaf8eb651d (diff) |
soc/intel/alderlake: Wait for panel power cycle to complete
The Alder Lake PEIM graphics driver executed as part of the FSP does
not wait for the panel power cycle to complete before it initializes
communication with the display. It can result in AUX channel
communication time out and PEIM graphics driver failing to bring up
graphics.
If we have performed some graphics operation in romstage, it is
possible that a panel power cycle is still in progress. To prevent any
issue with the PEIM graphics driver it is preferable to ensure that
panel power cycle is complete.
This patch replaces commit ba2cef5b5493
("soc/intel/common/block/early_graphics: Introduce a 200 ms delay")
workaround patch.
BUG=b:264526798
BRANCH=firmware-brya-14505.B
TEST=Developer screen is visible in the recovery flow
Change-Id: Iadd6c9552b184f7d6ec8df9d0d392634864ba50b
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72419
Reviewed-by: Anil Kumar K <anil.kumar.k@intel.com>
Reviewed-by: Tarun Tuli <taruntuli@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Diffstat (limited to 'src/soc/intel/common')
-rw-r--r-- | src/soc/intel/common/block/graphics/early_graphics.c | 17 |
1 files changed, 0 insertions, 17 deletions
diff --git a/src/soc/intel/common/block/graphics/early_graphics.c b/src/soc/intel/common/block/graphics/early_graphics.c index 8157a4c284..81faede2fa 100644 --- a/src/soc/intel/common/block/graphics/early_graphics.c +++ b/src/soc/intel/common/block/graphics/early_graphics.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ -#include <delay.h> #include <device/pci.h> #include <drivers/intel/gma/libgfxinit.h> #include <intelblocks/early_graphics.h> @@ -44,20 +43,4 @@ void early_graphics_stop(void) return; gma_gfxstop(); - - /* - * Temporary workaround - * - * It has been reported that the PEIM graphics driver may temporarily - * fail communication with the display if the time between libgfxinit - * turning off the displays and the PEIM driver initialization is too - * short. 200 ms has been identified as a safe delay. - * - * An investigation is in progress to come up with a better and long - * term solution. - * - * BUG:b:264526798 - */ - if (CONFIG(RUN_FSP_GOP)) - mdelay(200); } |