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authorSubrata Banik <subratabanik@google.com>2023-02-22 13:03:04 +0000
committerSubrata Banik <subratabanik@google.com>2023-02-25 09:29:19 +0000
commita247319ebeb274bb84e1512688ac179d38a40c32 (patch)
treececafe9356aae01a4d9896004fa95c095e328193 /src/soc/intel/common
parentc38f76410ba0e7565e61b5646efe749034fc2be0 (diff)
soc/intel/{adl, cmn, mtl}: Refactor MP Init related configs
This patch optimizes CPU MP Init related configs being used within multiple SoC directory and moving essential configs into common code to let the SoC user to choose as per the requirement. TEST=Able to build and boot google/kano and google/rex. Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: I12adcc04e84244656a0d2dcf97607bd036320887 Reviewed-on: https://review.coreboot.org/c/coreboot/+/73196 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kapil Porwal <kapilporwal@google.com> Reviewed-by: Tarun Tuli <taruntuli@google.com>
Diffstat (limited to 'src/soc/intel/common')
-rw-r--r--src/soc/intel/common/block/cpu/Kconfig24
1 files changed, 24 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/cpu/Kconfig b/src/soc/intel/common/block/cpu/Kconfig
index 132480482a..8b30dcf12c 100644
--- a/src/soc/intel/common/block/cpu/Kconfig
+++ b/src/soc/intel/common/block/cpu/Kconfig
@@ -18,6 +18,30 @@ config SOC_INTEL_COMMON_BLOCK_CPU_MPINIT
ensured that all MTRRs are re-programmed based on the DRAM
resource settings.
+choice
+ prompt "Application Processors (AP) Feature Programming Configuration to use"
+ default USE_FSP_FEATURE_PROGRAM_ON_APS if MP_SERVICES_PPI_V1 || MP_SERVICES_PPI_V2
+ default USE_COREBOOT_MP_INIT if MP_SERVICES_PPI_V2_NOOP
+
+config USE_FSP_FEATURE_PROGRAM_ON_APS
+ bool "Allow FSP running CPU feature programming on MP init"
+ help
+ Upon selection, coreboot brings APs from reset and the FSP runs feature programming.
+
+config USE_COREBOOT_MP_INIT
+ bool "Use coreboot MP init"
+ # FSP assumes ownership of the APs (Application Processors)
+ # upon passing `NULL` pointer to the CpuMpPpi FSP-S UPD.
+ # Hence, select `MP_SERVICES_PPI_V2_NOOP` config to pass a valid
+ # pointer to the CpuMpPpi UPD with FSP_UNSUPPORTED type APIs.
+ # This will protect APs from getting hijacked by FSP while coreboot
+ # decides to set SkipMpInit UPD.
+ select RELOAD_MICROCODE_PATCH
+ help
+ Upon selection, coreboot performs MP Init.
+
+endchoice
+
config SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE
bool
depends on SOC_INTEL_COMMON_BLOCK_CPU