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authorGaggery Tsai <gaggery.tsai@intel.com>2020-01-08 15:35:11 -0800
committerTim Wawrzynczak <twawrzynczak@chromium.org>2020-12-22 22:21:00 +0000
commit8d127846bc944fb416689ca1c93fd24f487f0bee (patch)
treebe107c667bbd056315ec520eaeb9e0710331e665 /src/soc/intel/common
parent8ba96b91dc1559c5a88bad5b4384885d3b384f11 (diff)
soc/intel/cannonlake: Add Iccmax and loadlines for CML-S
Following up 3ccae2b7, this patch adds Iccmax and AC/DC loadlines and iPL2 for CML-S CPUs. The information is from CML EDS volume 1, doc #606599 and pdg #610244. Change-Id: Id2797a979a8b6a52a34baae66f95c7136ed1dc72 Signed-off-by: Gaggery Tsai <gaggery.tsai@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38288 Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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