diff options
| author | Nick Vaccaro <nvaccaro@google.com> | 2020-05-05 18:23:43 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-05-13 08:55:51 +0000 |
| commit | 7d1a4b2584ce61f89f8b4de52880f0a6db96aa94 (patch) | |
| tree | 862bef396d23ec674808a825227c967bdbb8f651 /src/soc/intel/common | |
| parent | bc867d5b1d47e961b563431ec602934280fcbb96 (diff) | |
mb/google/volteer/variants/halvor: add two SPD files
Adds SPD_LPDDR4X_556b_1R_32Gb_8GbD_QDP_4267.spd.hex, which will be used
initially for the "H9HKNNNCRMBVAR-NEH" SKhynix part as DRAM ID #0.
Adds SPD_LPDDR4X_556b_1R_64Gb_16GbD_QDP_4267.spd.hex, which will be
used initially for the "MT53E1G64D4SQ-046 WT:A" Micron part as
DRAM ID #1.
BUG=b:155423877
TEST=none
Change-Id: I5580f602cd411e415dafcb36bd1ffa43c4f02f60
Signed-off-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41076
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common')
0 files changed, 0 insertions, 0 deletions