src/soc/intel: Drop unneeded empty lines

Change-Id: Id93aab5630e928ee4d7e957801e15a4cc8739fae
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44594
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

11 files changed, 0 insertions, 11 deletions

diff --git a/src/soc/intel/common/block/fast_spi/fast_spi.c b/src/soc/intel/common/block/fast_spi/fast_spi.c
index 655d11393a..4190253dd1 100644
--- a/src/soc/intel/common/block/fast_spi/fast_spi.c
+++ b/src/soc/intel/common/block/fast_spi/fast_spi.c
@@ -101,7 +101,6 @@ void fast_spi_set_lock_enable(void)
 {
 	fast_spi_set_bios_control_reg(SPIBAR_BIOS_CONTROL_LOCK_ENABLE);
 
-
 	fast_spi_read_post_write(SPIBAR_BIOS_CONTROL);
 }
 
diff --git a/src/soc/intel/common/block/fast_spi/fast_spi_flash.c b/src/soc/intel/common/block/fast_spi/fast_spi_flash.c
index a330b55552..da9949088e 100644
--- a/src/soc/intel/common/block/fast_spi/fast_spi_flash.c
+++ b/src/soc/intel/common/block/fast_spi/fast_spi_flash.c
@@ -154,7 +154,6 @@ static size_t get_xfer_len(const struct spi_flash *flash, uint32_t addr,
 	return xfer_len;
 }
 
-
 static int fast_spi_flash_erase(const struct spi_flash *flash,
 				uint32_t offset, size_t len)
 {
diff --git a/src/soc/intel/common/block/include/intelblocks/gpio.h b/src/soc/intel/common/block/include/intelblocks/gpio.h
index 2a27ac8baf..6e2bf1c138 100644
--- a/src/soc/intel/common/block/include/intelblocks/gpio.h
+++ b/src/soc/intel/common/block/include/intelblocks/gpio.h
@@ -81,7 +81,6 @@ struct reset_mapping {
 	uint32_t chipset;
 };
 
-
 /* Structure describes the groups within each community */
 struct pad_group {
 	int		first_pad; /* offset of first pad of the group relative
diff --git a/src/soc/intel/common/block/include/intelblocks/pcie_rp.h b/src/soc/intel/common/block/include/intelblocks/pcie_rp.h
index 5f5aab52f4..ca50b13247 100644
--- a/src/soc/intel/common/block/include/intelblocks/pcie_rp.h
+++ b/src/soc/intel/common/block/include/intelblocks/pcie_rp.h
@@ -3,7 +3,6 @@
 #ifndef SOC_INTEL_COMMON_BLOCK_PCIE_RP_H
 #define SOC_INTEL_COMMON_BLOCK_PCIE_RP_H
 
-
 /*
  * The PCIe Root Ports usually come in groups of up to 8 PCI-device
  * functions.
diff --git a/src/soc/intel/common/block/include/intelblocks/pcr.h b/src/soc/intel/common/block/include/intelblocks/pcr.h
index b092618920..dd02f0fe52 100644
--- a/src/soc/intel/common/block/include/intelblocks/pcr.h
+++ b/src/soc/intel/common/block/include/intelblocks/pcr.h
@@ -46,7 +46,6 @@ struct pcr_sbi_msg {
 	uint16_t fid; /* 0x0B - Function ID */
 };
 
-
 /*
  * API to perform sideband communication
  *
diff --git a/src/soc/intel/common/block/lpc/lpc_lib.c b/src/soc/intel/common/block/lpc/lpc_lib.c
index 481b3ea52d..ff44cc1a67 100644
--- a/src/soc/intel/common/block/lpc/lpc_lib.c
+++ b/src/soc/intel/common/block/lpc/lpc_lib.c
@@ -236,7 +236,6 @@ void lpc_set_serirq_mode(enum serirq_mode mode)
 	pci_write_config8(dev, LPC_SERIRQ_CTL, scnt);
 }
 
-
 void lpc_io_setup_comm_a_b(void)
 {
 	/* ComA Range 3F8h-3FFh [2:0] */
diff --git a/src/soc/intel/common/block/smbus/smbuslib.h b/src/soc/intel/common/block/smbus/smbuslib.h
index 05cecf351b..5b4e6eb126 100644
--- a/src/soc/intel/common/block/smbus/smbuslib.h
+++ b/src/soc/intel/common/block/smbus/smbuslib.h
@@ -3,7 +3,6 @@
 #ifndef SOC_INTEL_COMMON_BLOCK_SMBUS__LIB_H
 #define SOC_INTEL_COMMON_BLOCK_SMBUS__LIB_H
 
-
 /* SMBus IO Base Address */
 #define SMBUS_IO_BASE	0xefa0
 
diff --git a/src/soc/intel/common/block/smm/smihandler.c b/src/soc/intel/common/block/smm/smihandler.c
index 4998532837..ab88a51118 100644
--- a/src/soc/intel/common/block/smm/smihandler.c
+++ b/src/soc/intel/common/block/smm/smihandler.c
@@ -169,7 +169,6 @@ static void busmaster_disable_on_bus(int bus)
 	}
 }
 
-
 void smihandler_southbridge_sleep(
 	const struct smm_save_state_ops *save_state_ops)
 {
diff --git a/src/soc/intel/common/block/systemagent/systemagent.c b/src/soc/intel/common/block/systemagent/systemagent.c
index 6fb77224b6..bbccc89dcf 100644
--- a/src/soc/intel/common/block/systemagent/systemagent.c
+++ b/src/soc/intel/common/block/systemagent/systemagent.c
@@ -146,7 +146,6 @@ void sa_fill_gnvs(struct global_nvs *gnvs)
 	       gnvs->a4gb, gnvs->a4gs);
 }
 
-
 static void sa_get_mem_map(struct device *dev, uint64_t *values)
 {
 	int i;
diff --git a/src/soc/intel/common/block/systemagent/systemagent_def.h b/src/soc/intel/common/block/systemagent/systemagent_def.h
index 149e9b6ace..7517b140fb 100644
--- a/src/soc/intel/common/block/systemagent/systemagent_def.h
+++ b/src/soc/intel/common/block/systemagent/systemagent_def.h
@@ -3,7 +3,6 @@
 #ifndef SOC_INTEL_COMMON_BLOCK_SA_DEF_H
 #define SOC_INTEL_COMMON_BLOCK_SA_DEF_H
 
-
 /* Device 0:0.0 PCI configuration space */
 
 /* GMCH Graphics Control Register */
diff --git a/src/soc/intel/common/pch/include/intelpch/lockdown.h b/src/soc/intel/common/pch/include/intelpch/lockdown.h
index 17b8cbc0e9..22d7147764 100644
--- a/src/soc/intel/common/pch/include/intelpch/lockdown.h
+++ b/src/soc/intel/common/pch/include/intelpch/lockdown.h
@@ -3,7 +3,6 @@
 #ifndef SOC_INTEL_COMMON_PCH_LOCKDOWN_H
 #define SOC_INTEL_COMMON_PCH_LOCKDOWN_H
 
-
 /*
  * This function will get lockdown config specific to soc.
  *