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authorKyösti Mälkki <kyosti.malkki@gmail.com>2020-11-20 16:47:38 +0200
committerPatrick Georgi <pgeorgi@google.com>2021-01-07 11:02:03 +0000
commit7522a8fe0f7ef91bb3e66d3df1a2786bd4744f9b (patch)
tree6365f601165cea08a762561530643b80faf3fe81 /src/soc/intel/common
parentca965496ffd84d8510961c520aff22bf1cc3a3eb (diff)
arch/x86: Move prologue to .init section
For arch/x86 the realmode part has to be located within the same 64 KiB as the reset vector. Some older intel platforms also require 4 KiB alignment for _start16bit. To enforce the above, and to separate required parts of .text without matching *(.text.*) rules in linker scripts, tag the pre-C environment assembly code with section .init directive. Description of .init section for ELF: This section holds executable instructions that contribute to the process initialization code. When a program starts to run, the system arranges to execute the code in this section before calling the main program entry point (called main for C programs). Change-Id: If32518b1c19d08935727330314904b52a246af3c Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47599 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common')
-rw-r--r--src/soc/intel/common/block/cpu/car/cache_as_ram.S2
-rw-r--r--src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S2
2 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/cpu/car/cache_as_ram.S b/src/soc/intel/common/block/cpu/car/cache_as_ram.S
index aaf6af7d5a..49b40a8d9a 100644
--- a/src/soc/intel/common/block/cpu/car/cache_as_ram.S
+++ b/src/soc/intel/common/block/cpu/car/cache_as_ram.S
@@ -9,6 +9,8 @@
#include <rules.h>
#include <intelblocks/msr.h>
+.section .init, "ax", @progbits
+
.code32
.global bootblock_pre_c_entry
bootblock_pre_c_entry:
diff --git a/src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S b/src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S
index 04dc5331e1..a2e85b9aac 100644
--- a/src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S
+++ b/src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S
@@ -10,6 +10,8 @@
#define CBFS_FILE_CHECKSUM (CBFS_FILE_TYPE + 4)
#define CBFS_FILE_OFFSET (CBFS_FILE_CHECKSUM + 4)
+.section .init, "ax", @progbits
+
.extern temp_ram_init_params
.global bootblock_pre_c_entry