diff options
| author | Keith Short <keithshort@chromium.org> | 2019-05-09 11:40:34 -0600 |
|---|---|---|
| committer | Duncan Laurie <dlaurie@chromium.org> | 2019-05-22 17:44:53 +0000 |
| commit | 15588b03b36aa875e2a2a31cc649a2d9dff7581e (patch) | |
| tree | 70c054b070ca0b4f962b362d06ff62ef8a7454e9 /src/soc/intel/common | |
| parent | 24302633a558e545efcc84178136bd1879f6d8ee (diff) | |
post_code: add post code for hardware initialization failure
Add a new post code POST_HW_INIT_FAILURE, used when coreboot fails to
detect or initialize a required hardware component.
BUG=b:124401932
BRANCH=sarien
TEST=build coreboot for sarien and arcada platforms
Change-Id: I73820d24b3e1c269d9d446a78ef4f97e167e3552
Signed-off-by: Keith Short <keithshort@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32774
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/soc/intel/common')
| -rw-r--r-- | src/soc/intel/common/block/graphics/graphics.c | 6 | ||||
| -rw-r--r-- | src/soc/intel/common/block/p2sb/p2sb.c | 12 | ||||
| -rw-r--r-- | src/soc/intel/common/block/pmc/pmc.c | 3 |
3 files changed, 14 insertions, 7 deletions
diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c index 5d3b4a15cf..4cea21b075 100644 --- a/src/soc/intel/common/block/graphics/graphics.c +++ b/src/soc/intel/common/block/graphics/graphics.c @@ -58,7 +58,8 @@ uintptr_t graphics_get_memory_base(void) */ uintptr_t memory_base = graphics_get_bar(PCI_BASE_ADDRESS_2); if (!memory_base) - die("GMADR is not programmed!"); + die_with_post_code(POST_HW_INIT_FAILURE, + "GMADR is not programmed!"); return memory_base; } @@ -74,7 +75,8 @@ static uintptr_t graphics_get_gtt_base(void) if (!gtt_base) { gtt_base = graphics_get_bar(PCI_BASE_ADDRESS_0); if (!gtt_base) - die("GTTMMADR is not programmed!"); + die_with_post_code(POST_HW_INIT_FAILURE, + "GTTMMADR is not programmed!"); } return gtt_base; } diff --git a/src/soc/intel/common/block/p2sb/p2sb.c b/src/soc/intel/common/block/p2sb/p2sb.c index 1d7c091a69..24cde1b6c9 100644 --- a/src/soc/intel/common/block/p2sb/p2sb.c +++ b/src/soc/intel/common/block/p2sb/p2sb.c @@ -36,7 +36,8 @@ static pci_devfn_t p2sb_get_device(void) pci_devfn_t dev = PCI_DEV(0, PCI_SLOT(devfn), PCI_FUNC(devfn)); if (dev == PCI_DEV_INVALID) - die("PCH_DEV_P2SB not found!\n"); + die_with_post_code(POST_HW_INIT_FAILURE, + "PCH_DEV_P2SB not found!\n"); return dev; } @@ -45,7 +46,8 @@ static struct device *p2sb_get_device(void) { struct device *dev = PCH_DEV_P2SB; if (!dev) - die("PCH_DEV_P2SB not found!\n"); + die_with_post_code(POST_HW_INIT_FAILURE, + "PCH_DEV_P2SB not found!\n"); return dev; } @@ -99,7 +101,8 @@ void p2sb_unhide(void) if (pci_read_config16(P2SB_GET_DEV, PCI_VENDOR_ID) != PCI_VENDOR_ID_INTEL) - die("Unable to unhide PCH_DEV_P2SB device !\n"); + die_with_post_code(POST_HW_INIT_FAILURE, + "Unable to unhide PCH_DEV_P2SB device !\n"); } void p2sb_hide(void) @@ -108,7 +111,8 @@ void p2sb_hide(void) if (pci_read_config16(P2SB_GET_DEV, PCI_VENDOR_ID) != 0xFFFF) - die("Unable to hide PCH_DEV_P2SB device !\n"); + die_with_post_code(POST_HW_INIT_FAILURE, + "Unable to hide PCH_DEV_P2SB device !\n"); } static void p2sb_configure_endpoints(int epmask_id, uint32_t mask) diff --git a/src/soc/intel/common/block/pmc/pmc.c b/src/soc/intel/common/block/pmc/pmc.c index 43543a1cc5..eaaf1252ea 100644 --- a/src/soc/intel/common/block/pmc/pmc.c +++ b/src/soc/intel/common/block/pmc/pmc.c @@ -91,7 +91,8 @@ static void pch_pmc_read_resources(struct device *dev) struct pmc_resource_config *config = &pmc_cfg; if (pmc_soc_get_resources(config) < 0) - die("Unable to get PMC controller resource information!"); + die_with_post_code(POST_HW_INIT_FAILURE, + "Unable to get PMC controller resource information!"); /* Get the normal PCI resources of this device. */ pci_dev_read_resources(dev); |