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authorHarsha B R <harsha.b.r@intel.com>2023-02-04 18:27:39 +0530
committerSridhar Siricilla <sridhar.siricilla@intel.com>2023-02-07 05:34:24 +0000
commit1a832d0c0678bef87e5f98cdee359cb305bcde8c (patch)
tree12bacdc764b7b2048ff1ed24d849361b20d3b309 /src/soc/intel/common/nhlt.c
parent893c3ae892961facc9be8bd300160222e694ab34 (diff)
mb/intel/mtlrvp: Enable ACPI support for Type-C ports
This patch adds ACPI support for Type-C ports. BUG=b:224325352 BRANCH=None Test=Able to build and boot MTLRVP. Verify SSDT for the corresponding entry, \_SB.PCI0.PMC.MUX.CON0 under Device (CON0) \_SB.PCI0.PMC.MUX.CON1 under Device (CON1) \_SB.PCI0.PMC.MUX.CON2 under Device (CON2) \_SB.PCI0.PMC.MUX.CON3 under Device (CON3) Signed-off-by: Harsha B R <harsha.b.r@intel.com> Change-Id: I8e5957ca7a6c542a64d79b2ceefbed79ead15811 Signed-off-by: Jamie Ryu <jamie.m.ryu@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72789 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Usha P <usha.p@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Diffstat (limited to 'src/soc/intel/common/nhlt.c')
0 files changed, 0 insertions, 0 deletions