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authorFurquan Shaikh <furquan@chromium.org>2017-04-04 11:47:19 -0700
committerFurquan Shaikh <furquan@google.com>2017-04-05 20:33:04 +0200
commit340908aecf01093d35aaf0b71c55ed65c3ebbeac (patch)
tree7d011dfbcc88e75c615b040a491ee1a979df844c /src/soc/intel/common/lpss_i2c.h
parentdd63f5978e44cdbf71047beb2e2b85c524ff3614 (diff)
soc/intel/lpss: Provide common LPSS clock config
Since there are multiple controllers in the LPSS and all use the same frequency, provide a single Kconfig option for LPSS_CLOCK_MHZ. BUG=b:35583330 Change-Id: I3c0cb62d56916e6e5f671fb5f40210f4cb33316f Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/19115 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc/intel/common/lpss_i2c.h')
-rw-r--r--src/soc/intel/common/lpss_i2c.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/common/lpss_i2c.h b/src/soc/intel/common/lpss_i2c.h
index b9517701f6..b46e657fd6 100644
--- a/src/soc/intel/common/lpss_i2c.h
+++ b/src/soc/intel/common/lpss_i2c.h
@@ -21,7 +21,7 @@
/*
* Timing values are in units of clock period, with the clock speed
- * provided by the SOC in CONFIG_SOC_INTEL_COMMON_LPSS_I2C_CLOCK_MHZ.
+ * provided by the SOC in CONFIG_SOC_INTEL_COMMON_LPSS_CLOCK_MHZ.
* Automatic configuration is done based on requested speed, but the
* values may need tuned depending on the board and the number of
* devices present on the bus.