soc/intel/cnvw: Add GPEH Method

Add a general purpose handle to allow CNVi to be notified
of state changes.

Intel document #559910 details this.

Change-Id: I36c98c525c99fb2b7b5ebd8b0e392e6626e97290
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83710
Reviewed-by: Nicholas Sudsgaard <devel+coreboot@nsudsgaard.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

1 files changed, 29 insertions, 0 deletions

diff --git a/src/soc/intel/common/block/cnvi/cnvi.c b/src/soc/intel/common/block/cnvi/cnvi.c
index 9759b542af..fcfb03fd1b 100644
--- a/src/soc/intel/common/block/cnvi/cnvi.c
+++ b/src/soc/intel/common/block/cnvi/cnvi.c
@@ -287,6 +287,35 @@ static void cnvw_fill_ssdt(const struct device *dev)
 	}
 	acpigen_pop_len();
 
+/*
+ *	Method (GPEH, 0, NotSerialized)
+ *	{
+ *		If ((VDID == 0xFFFFFFFF))
+ *		{
+ *			Return (Zero)
+ *		}
+ *		If ((PMES == One))
+ *		{
+ *			Notify (CNVW, 0x02) // Device Wake
+ *		}
+ *	}
+ */
+	acpigen_write_method("GPEH", 0);
+	{
+		acpigen_write_if_lequal_namestr_int("VDID", 0xffffffff);
+		{
+			acpigen_write_return_integer(0);
+		}
+		acpigen_pop_len();
+
+		acpigen_write_if_lequal_namestr_int("PMES", 1);
+		{
+			acpigen_notify("CNVW", 2);
+		}
+		acpigen_pop_len();
+	}
+	acpigen_pop_len();
+
 	acpigen_write_scope_end();
 }