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authorSean Rhodes <sean@starlabs.systems>2023-08-25 13:55:39 +0100
committerSubrata Banik <subratabanik@google.com>2023-09-15 05:01:24 +0000
commit56b9ac2a64d3e3a6c74b8f80ebe7442674993fd4 (patch)
treebfbc4432f9f3d7d2102f4f6e836f8082c9895411 /src/soc/intel/common/block
parent244a60ea4429da58ce371de46169b2dfd0f2654c (diff)
soc/intel/meteorlake: Remove the check for INFR
Remove the check to follow the new flow that commit 9c348a7b7ea3 ("soc/intel/alderlake: Fix processor hang while plug unplug of TBT device") introduced. Processor hang is observed while hot plug unplug of TBT device. BIOS should execute TBT PCIe RP RTD3 flow based on the value of TBT_DMA_CFG_VS_CAP_9[30]. It should skip TBT PCIe RP RTD3 flow, if BIT30 in TBT FW version is not set. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Ie822b8e1fd7592a31275db8455519c4cc6ac02ad Reviewed-on: https://review.coreboot.org/c/coreboot/+/77456 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kapil Porwal <kapilporwal@google.com> Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/soc/intel/common/block')
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