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authorJonathan Zhang <jonzhang@fb.com>2021-03-06 10:31:46 -0800
committerSubrata Banik <subrata.banik@intel.com>2021-03-11 04:26:21 +0000
commit492a792d3872ee2683db169fb011daf87b71bff9 (patch)
tree6c37d7173aa9b6d08865be738113ce92023460a8 /src/soc/intel/common/block
parent238242bda42a42b4f8608d73a27d5e3a6bc54a13 (diff)
soc/intel/common/block: Add PCI IDs for EmmitsBurg PCH
According to Intel EmmitsBurg EDS, doc# 606161: * Add PCI devid for SPI. * Add PCI devid for ESPI (LPC). EmmitsBurg (EBG) PCH is used in the chipset with Sapphire Rapids Scalable Processor (SPR-SP). Signed-off-by: Reddy Chagam <anjaneya.chagam@intel.com> Signed-off-by: Subrata Banik <subrata.banik@intel.com> Signed-off-by: Jonathan Zhang <jonzhang@fb.com> Change-Id: Ie8925cb739c95c34febf9002149de437d19c8234 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51321 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel/common/block')
-rw-r--r--src/soc/intel/common/block/lpc/lpc.c1
-rw-r--r--src/soc/intel/common/block/spi/spi.c1
2 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/lpc/lpc.c b/src/soc/intel/common/block/lpc/lpc.c
index 9fbadf7e52..df34f3faa3 100644
--- a/src/soc/intel/common/block/lpc/lpc.c
+++ b/src/soc/intel/common/block/lpc/lpc.c
@@ -329,6 +329,7 @@ static const unsigned short pci_device_ids[] = {
PCI_DEVICE_ID_INTEL_ADP_M_ESPI_29,
PCI_DEVICE_ID_INTEL_ADP_M_ESPI_30,
PCI_DEVICE_ID_INTEL_ADP_M_ESPI_31,
+ PCI_DEVICE_ID_INTEL_SPR_ESPI_1,
0
};
diff --git a/src/soc/intel/common/block/spi/spi.c b/src/soc/intel/common/block/spi/spi.c
index beac64cb69..7e7e0a7382 100644
--- a/src/soc/intel/common/block/spi/spi.c
+++ b/src/soc/intel/common/block/spi/spi.c
@@ -107,6 +107,7 @@ static const unsigned short pci_device_ids[] = {
PCI_DEVICE_ID_INTEL_ADP_M_SPI0,
PCI_DEVICE_ID_INTEL_ADP_M_SPI1,
PCI_DEVICE_ID_INTEL_ADP_M_SPI2,
+ PCI_DEVICE_ID_INTEL_SPR_HWSEQ_SPI,
0
};