diff options
author | Martin Roth <martin@coreboot.org> | 2021-10-01 14:53:22 -0600 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2021-10-05 18:07:08 +0000 |
commit | 26f97f9532933da3c1d72a7918c8a24457bbc1c0 (patch) | |
tree | 8c25279e58ef541fae197ec193f5642a9b21b2d4 /src/soc/intel/common/block | |
parent | 50863daef8ed75c0cb3dfd375e7622c898de5821 (diff) |
src/soc to src/superio: Fix spelling errors
These issues were found and fixed by codespell, a useful tool for
finding spelling errors.
Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: Ieafbc93e49fcef198ac6e31fc8a3b708c395e08e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58082
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common/block')
-rw-r--r-- | src/soc/intel/common/block/cpu/car/cache_as_ram.S | 2 | ||||
-rw-r--r-- | src/soc/intel/common/block/fast_spi/fast_spi.c | 2 | ||||
-rw-r--r-- | src/soc/intel/common/block/include/intelblocks/tcss.h | 2 | ||||
-rw-r--r-- | src/soc/intel/common/block/pmc/Kconfig | 2 | ||||
-rw-r--r-- | src/soc/intel/common/block/usb4/Kconfig | 2 |
5 files changed, 5 insertions, 5 deletions
diff --git a/src/soc/intel/common/block/cpu/car/cache_as_ram.S b/src/soc/intel/common/block/cpu/car/cache_as_ram.S index f0c3149833..cac7854d34 100644 --- a/src/soc/intel/common/block/cpu/car/cache_as_ram.S +++ b/src/soc/intel/common/block/cpu/car/cache_as_ram.S @@ -545,7 +545,7 @@ program_sf2: /* * Calculate the SF Mask 1: - * 1. Calcuate SFWayCnt = IA32_SF_QOS_INFO & Bit [5:0] + * 1. Calculate SFWayCnt = IA32_SF_QOS_INFO & Bit [5:0] * 2. if CONFIG_SF_MASK_2WAYS_PER_BIT: SFWayCnt = SFWayCnt / 2 * 3. Set SF_MASK_1 = ((1 << SFWayCnt) - 1) - IA32_CR_SF_QOS_MASK_2 */ diff --git a/src/soc/intel/common/block/fast_spi/fast_spi.c b/src/soc/intel/common/block/fast_spi/fast_spi.c index 843071e2a8..93de2ecb87 100644 --- a/src/soc/intel/common/block/fast_spi/fast_spi.c +++ b/src/soc/intel/common/block/fast_spi/fast_spi.c @@ -325,7 +325,7 @@ static void fast_spi_enable_ext_bios(void) "Only 32MiB windows are supported for extended BIOS!"); #endif - /* Confgiure DMI Source decode for Extended BIOS Region */ + /* Configure DMI Source decode for Extended BIOS Region */ if (dmi_enable_gpmr(CONFIG_EXT_BIOS_WIN_BASE, CONFIG_EXT_BIOS_WIN_SIZE, soc_get_spi_dmi_destination_id()) == CB_ERR) return; diff --git a/src/soc/intel/common/block/include/intelblocks/tcss.h b/src/soc/intel/common/block/include/intelblocks/tcss.h index 97d63af41a..c07c96cd82 100644 --- a/src/soc/intel/common/block/include/intelblocks/tcss.h +++ b/src/soc/intel/common/block/include/intelblocks/tcss.h @@ -130,7 +130,7 @@ enum pmc_ipc_command_type { struct tcss_mux_info { bool dp; /* DP connected */ bool usb; /* USB connected */ - bool cable; /* Activ/Passive Cable */ + bool cable; /* Active/Passive Cable */ bool polarity; /* polarity of connected device */ bool hpd_lvl; /* HPD Level assert */ bool hpd_irq; /* HPD IRQ assert */ diff --git a/src/soc/intel/common/block/pmc/Kconfig b/src/soc/intel/common/block/pmc/Kconfig index aaf4479745..e3978e29dd 100644 --- a/src/soc/intel/common/block/pmc/Kconfig +++ b/src/soc/intel/common/block/pmc/Kconfig @@ -17,7 +17,7 @@ config SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE bool help Select this on platforms where the PMC device is discoverable - when scanning busses. + when scanning buses. config SOC_INTEL_COMMON_BLOCK_PMC_EPOC bool diff --git a/src/soc/intel/common/block/usb4/Kconfig b/src/soc/intel/common/block/usb4/Kconfig index d4e1c25aa1..bc1eb19d49 100644 --- a/src/soc/intel/common/block/usb4/Kconfig +++ b/src/soc/intel/common/block/usb4/Kconfig @@ -25,4 +25,4 @@ config SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES depends on SOC_INTEL_COMMON_BLOCK_USB4 select PCIEXP_HOTPLUG help - Enable USB4 PCIe resources for reserving hotplug busses and memory. + Enable USB4 PCIe resources for reserving hotplug buses and memory. |