diff options
author | Arthur Heymans <arthur@aheymans.xyz> | 2019-10-20 14:27:40 +0200 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2019-11-06 14:02:21 +0000 |
commit | 08aeda6c14886d39e04382c7fe6d24c4b45c3b0a (patch) | |
tree | 8abec35432895385549715910410de3e3c84ce19 /src/soc/intel/common/block | |
parent | 71bd7e439fed00c73712be4f9522f412e3ab8559 (diff) |
soc/intel/common: Make native and FSP-T CAR init mutually exclusive
postcar stage does not consume cpulib.c, so don't include it there.
Change-Id: Ie723412dcf09151cdbb41e357ad9c2e4f393cb47
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36168
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common/block')
-rw-r--r-- | src/soc/intel/common/block/cpu/Makefile.inc | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/src/soc/intel/common/block/cpu/Makefile.inc b/src/soc/intel/common/block/cpu/Makefile.inc index 323d15739c..deddb67a16 100644 --- a/src/soc/intel/common/block/cpu/Makefile.inc +++ b/src/soc/intel/common/block/cpu/Makefile.inc @@ -1,13 +1,13 @@ +ifeq ($(CONFIG_FSP_CAR),y) +bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU)+= car/cache_as_ram_fsp.S +postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU) += car/exit_car_fsp.S +else bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CAR) += car/cache_as_ram.S bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CAR) += ../../../../../cpu/x86/early_reset.S -bootblock-$(CONFIG_FSP_CAR)+= car/cache_as_ram_fsp.S -bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU) += cpulib.c - -romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU) += cpulib.c - postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CAR) += car/exit_car.S -postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU) += cpulib.c -postcar-$(CONFIG_FSP_CAR) += car/exit_car_fsp.S +endif +bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU) += cpulib.c +romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU) += cpulib.c ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU) += cpulib.c ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT) += mp_init.c |