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authorKyösti Mälkki <kyosti.malkki@gmail.com>2021-01-15 13:46:11 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2021-02-11 16:35:32 +0000
commitd6ccbb9d48f97dd3bbd4b947fe3bc4857216a363 (patch)
tree5b6662b1f870efc37cbf221167d7d6b7a56dff01 /src/soc/intel/common/block
parente0936a56ec27a75486743d524958fb34b6f9e896 (diff)
mainboards: Drop PWRS from GNVS
Initialize variable to 1 to indicate AC power supply. If platform has EC it will set this correctly based on whether plugged on the charger or not. Change-Id: I3f834cf7563b9e512fcab34cdb7a27a9f0fd31c0 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49352 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common/block')
-rw-r--r--src/soc/intel/common/block/acpi/acpi/globalnvs.asl2
-rw-r--r--src/soc/intel/common/block/include/intelblocks/nvs.h2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/common/block/acpi/acpi/globalnvs.asl b/src/soc/intel/common/block/acpi/acpi/globalnvs.asl
index d9ecfb3d84..1290fb0ec2 100644
--- a/src/soc/intel/common/block/acpi/acpi/globalnvs.asl
+++ b/src/soc/intel/common/block/acpi/acpi/globalnvs.asl
@@ -13,7 +13,7 @@ Field (GNVS, ByteAcc, NoLock, Preserve)
PPCM, 8, // 0x04 - Max PPC State
TLVL, 8, // 0x05 - Throttle Level Limit
LIDS, 8, // 0x06 - LID State
- PWRS, 8, // 0x07 - AC Power State
+ , 8, // 0x07 - AC Power State
CBMC, 32, // 0x08 - 0x0b AC Power State
PM1I, 64, // 0x0c - 0x13 PM1 wake status bit
GPEI, 64, // 0x14 - 0x17 GPE wake status bit
diff --git a/src/soc/intel/common/block/include/intelblocks/nvs.h b/src/soc/intel/common/block/include/intelblocks/nvs.h
index cba60f6040..1bbd4c1660 100644
--- a/src/soc/intel/common/block/include/intelblocks/nvs.h
+++ b/src/soc/intel/common/block/include/intelblocks/nvs.h
@@ -13,7 +13,7 @@ struct __packed global_nvs {
u8 ppcm; /* 0x04 - Max PPC State */
u8 tlvl; /* 0x05 - Throttle Level Limit */
u8 lids; /* 0x06 - LID State */
- u8 pwrs; /* 0x07 - AC Power State */
+ u8 unused_was_pwrs; /* 0x07 - AC Power State */
u32 cbmc; /* 0x08 - 0xb coreboot Memory Console */
u64 pm1i; /* 0x0c - 0x13 PM1 wake status bit */
u64 gpei; /* 0x14 - 0x1b GPE wake status bit */