diff options
author | Tan, Lean Sheng <lean.sheng.tan@intel.com> | 2020-08-25 08:24:47 -0700 |
---|---|---|
committer | Subrata Banik <subrata.banik@intel.com> | 2020-08-27 03:21:32 +0000 |
commit | 7337bdcbcaa46d8ffc8cbde1fd0889ca9ac66af6 (patch) | |
tree | 32cca19a60c38ca5201e4687b08fffc2fa0bb2b5 /src/soc/intel/common/block | |
parent | 48697fe009cd1beb5b07f13f0080f7afaef73998 (diff) |
soc/intel/common: Add Elkhart Lake B0 CPU ID
Add Elkhart Lake B0 CPU ID.
Signed-off-by: Tan, Lean Sheng <lean.sheng.tan@intel.com>
Change-Id: I90fab9a6392443005ee7224049931c687cb77c0c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44798
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Diffstat (limited to 'src/soc/intel/common/block')
-rw-r--r-- | src/soc/intel/common/block/cpu/mp_init.c | 1 | ||||
-rw-r--r-- | src/soc/intel/common/block/include/intelblocks/mp_init.h | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c index 5306431fec..c3fe40bc18 100644 --- a/src/soc/intel/common/block/cpu/mp_init.c +++ b/src/soc/intel/common/block/cpu/mp_init.c @@ -75,6 +75,7 @@ static const struct cpu_device_id cpu_table[] = { { X86_VENDOR_INTEL, CPUID_TIGERLAKE_A0 }, { X86_VENDOR_INTEL, CPUID_TIGERLAKE_B0 }, { X86_VENDOR_INTEL, CPUID_ELKHARTLAKE_A0 }, + { X86_VENDOR_INTEL, CPUID_ELKHARTLAKE_B0 }, { X86_VENDOR_INTEL, CPUID_JASPERLAKE_A0 }, { X86_VENDOR_INTEL, CPUID_ALDERLAKE_S_A0 }, { X86_VENDOR_INTEL, CPUID_ALDERLAKE_P_A0 }, diff --git a/src/soc/intel/common/block/include/intelblocks/mp_init.h b/src/soc/intel/common/block/include/intelblocks/mp_init.h index 6220b766ab..96b3c0a2c8 100644 --- a/src/soc/intel/common/block/include/intelblocks/mp_init.h +++ b/src/soc/intel/common/block/include/intelblocks/mp_init.h @@ -43,6 +43,7 @@ #define CPUID_TIGERLAKE_A0 0x806c0 #define CPUID_TIGERLAKE_B0 0x806c1 #define CPUID_ELKHARTLAKE_A0 0x90660 +#define CPUID_ELKHARTLAKE_B0 0x90661 #define CPUID_ALDERLAKE_S_A0 0x90670 #define CPUID_ALDERLAKE_P_A0 0x906a0 /* |