diff options
| author | Eric Lai <ericr_lai@compal.corp-partner.google.com> | 2021-11-17 15:58:25 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-11-18 23:32:43 +0000 |
| commit | eae7bf2327f7f1fab7c0177e5ee2116b624a92a9 (patch) | |
| tree | 28c9623652115fb08b2af7f182a3bd716a86b8d2 /src/soc/intel/common/block | |
| parent | 88295c35cc06bc0650111d2f92e0b7235b7164b0 (diff) | |
mb/google/brya/var/felwinter: Correct USB3 TCSS setting
Based on Intel Kit#615686, USB3 only needs to disable TBT and DMA per
port. And if uses USB3 directly you need to set TcssAuxOri accordingly.
BUG=b:206716691,b:205235144
TEST=USB function work as expected at USB3 only sku.
Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Change-Id: I303d042d6c80194ff48130fe4e9c04b49ca13ee8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59385
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc/intel/common/block')
0 files changed, 0 insertions, 0 deletions