diff options
| author | Eric Lai <ericr_lai@compal.corp-partner.google.com> | 2022-02-07 12:16:28 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-02-09 23:23:31 +0000 |
| commit | 9f9d5106c5f6f40bbb1e42c70e5b577ec59793bf (patch) | |
| tree | 3e5c9a7af338a5ee841094294214c49108591286 /src/soc/intel/common/block | |
| parent | 7d7f3ae69b3b981b632bb8585e5d17497387496a (diff) | |
soc/intel/common/gpio: Add PAD_NC_LOCK and PAD_CFG_GPI_SCI_LOCK macro
Add PAD_NC_LOCK and PAD_CFG_GPI_SCI_LOCK macro to support mainboard
to lock NC and GPI_SCI pins as applicable.
BUG=b:216583542
TEST=build passed
Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Change-Id: Ie44d72f4152b55183d900228df3e3670358f7518
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61655
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common/block')
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/gpio_defs.h | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/gpio_defs.h b/src/soc/intel/common/block/include/intelblocks/gpio_defs.h index d9d882cc5f..32a7d6b08e 100644 --- a/src/soc/intel/common/block/include/intelblocks/gpio_defs.h +++ b/src/soc/intel/common/block/include/intelblocks/gpio_defs.h @@ -364,6 +364,14 @@ PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), \ PAD_PULL(pull) | PAD_IOSSTATE(TxDRxE)) +/* No Connect configuration with lock */ +#define PAD_NC_LOCK(pad, pull, lock_action) \ + _PAD_CFG_STRUCT_LOCK(pad, \ + PAD_RESET(PWROK) | PAD_FUNC(GPIO) | \ + PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), \ + PAD_PULL(pull) | PAD_IOSSTATE(TxDRxE), \ + PAD_LOCK(lock_action)) + /* General purpose input, routed to APIC */ #define PAD_CFG_GPI_APIC(pad, pull, rst, trig, inv) \ _PAD_CFG_STRUCT(pad, \ @@ -427,6 +435,13 @@ PAD_IRQ_CFG(SCI, trig, inv), PAD_PULL(pull) | \ PAD_IOSSTATE(TxDRxE)) +/* General purpose input with lock, routed to SCI */ +#define PAD_CFG_GPI_SCI_LOCK(pad, pull, trig, inv, lock_action) \ + _PAD_CFG_STRUCT_LOCK(pad, \ + PAD_FUNC(GPIO) | PAD_RESET(PWROK) | PAD_BUF(TX_DISABLE) | \ + PAD_IRQ_CFG(SCI, trig, inv), PAD_PULL(pull) | \ + PAD_IOSSTATE(TxDRxE), PAD_LOCK(lock_action)) + /* General purpose input, routed to SCI */ #define PAD_CFG_GPI_SCI_IOS(pad, pull, rst, trig, inv, iosstate, iosterm) \ _PAD_CFG_STRUCT(pad, \ |