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authorYuchi Chen <yuchi.chen@intel.com>2024-11-08 14:18:08 +0800
committerLean Sheng Tan <sheng.tan@9elements.com>2024-11-19 10:33:03 +0000
commit7cfdb3bc1a59280c1aeb2506e60384c42e05f6de (patch)
tree1251152aa47a54c60320271c1690b8aa15592a3f /src/soc/intel/common/block
parent26be949137e6ba7e5cf70b668731e7ef219ec283 (diff)
soc/intel/common/block/gpmr: Disable GPMR regs if ext-BIOS is disabled
General Purpose Memory Range registers are only used if extended BIOS region is enabled now, this patch wraps the related code with Kconfig item `CONFIG_FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW`. Change-Id: I975840684b3dd9e9e76ec6a08de12d8dd3c8f08a Signed-off-by: Yuchi Chen <yuchi.chen@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/85041 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Shuo Liu <shuo.liu@intel.com>
Diffstat (limited to 'src/soc/intel/common/block')
-rw-r--r--src/soc/intel/common/block/gpmr/Kconfig2
-rw-r--r--src/soc/intel/common/block/gpmr/gpmr.c2
2 files changed, 3 insertions, 1 deletions
diff --git a/src/soc/intel/common/block/gpmr/Kconfig b/src/soc/intel/common/block/gpmr/Kconfig
index 313b0ccb53..920830ff45 100644
--- a/src/soc/intel/common/block/gpmr/Kconfig
+++ b/src/soc/intel/common/block/gpmr/Kconfig
@@ -12,6 +12,6 @@ config USE_SOC_GPMR_DEFS
bool
default n
help
- Specify if the SoC have specific GPMR register definitions.
+ Specify if the SoC has specific GPMR register definitions.
endif
diff --git a/src/soc/intel/common/block/gpmr/gpmr.c b/src/soc/intel/common/block/gpmr/gpmr.c
index cef2e57dfa..53682ae486 100644
--- a/src/soc/intel/common/block/gpmr/gpmr.c
+++ b/src/soc/intel/common/block/gpmr/gpmr.c
@@ -33,6 +33,7 @@ void gpmr_or32(uint16_t offset, uint32_t ordata)
return pcr_or32(PID_DMI, offset, ordata);
}
+#if CONFIG(FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW)
/* Check for available free gpmr */
static int get_available_gpmr(void)
{
@@ -85,3 +86,4 @@ enum cb_err enable_gpmr(uint32_t base, uint32_t size, uint32_t dest_id)
return CB_SUCCESS;
}
+#endif